Alexey Kostinsky

Person

Nahariya, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Programmable on-die termination timing in a multi-rank system
- Patent number 10,680,613
- Issue date Jun 9, 2020
- Intel Corporation
- Kuljit S. Bains
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interference testing
- Patent number 10,516,439
- Issue date Dec 24, 2019
- Intel Corporation
- Alexey Kostinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable on-die termination timing in a multi-rank system
- Patent number 10,141,935
- Issue date Nov 27, 2018
- Intel Corporation
- Kuljit S Bains
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-die termination control without a dedicated pin in a multi-rank...
- Patent number 9,948,299
- Issue date Apr 17, 2018
- Intel Corporation
- Kuljit S. Bains
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-die termination control without a dedicated pin in a multi-rank...
- Patent number 9,871,519
- Issue date Jan 16, 2018
- Intel Corporation
- Kuljit S. Bains
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interference testing
- Patent number 9,722,663
- Issue date Aug 1, 2017
- Intel Corporation
- Alexey Kostinsky
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Avoiding DQS false sampling triggers
- Patent number 9,640,277
- Issue date May 2, 2017
- Intel Corporation
- Nadav Bonen
- G11 - INFORMATION STORAGE
Information Patent Grant
Training for command/address/control/clock delays under uncertain i...
- Patent number 9,026,725
- Issue date May 5, 2015
- Intel Corporation
- Alexey Kostinsky
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
PROGRAMMABLE ON-DIE TERMINATION TIMING IN A MULTI-RANK SYSTEM
- Publication number 20190036531
- Publication date Jan 31, 2019
- Intel Corporation
- Kuljit S. Bains
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFERENCE TESTING
- Publication number 20170359099
- Publication date Dec 14, 2017
- Intel Corporation
- Alexey Kostinsky
- G01 - MEASURING TESTING
Information Patent Application
ON-DIE TERMINATION CONTROL WITHOUT A DEDICATED PIN IN A MULTI-RANK...
- Publication number 20170194962
- Publication date Jul 6, 2017
- Intel Corporation
- Kuljit S. BAINS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE ON-DIE TERMINATION TIMING IN A MULTI-RANK SYSTEM
- Publication number 20170093400
- Publication date Mar 30, 2017
- Intel Corporation
- Kuljit S. Bains
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-DIE TERMINATION CONTROL WITHOUT A DEDICATED PIN IN A MULTI-RANK...
- Publication number 20170077928
- Publication date Mar 16, 2017
- Intel Corporation
- Kuljit S. BAINS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFERENCE TESTING
- Publication number 20150280781
- Publication date Oct 1, 2015
- Intel Corporation
- Alexey Kostinsky
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
AVOIDING DQS FALSE SAMPLING TRIGGERS
- Publication number 20150186328
- Publication date Jul 2, 2015
- Nadav Bonen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRAINING FOR MAPPING SWIZZLED DATA TO COMMAND/ADDRESS SIGNALS
- Publication number 20140189224
- Publication date Jul 3, 2014
- ALEXEY KOSTINSKY
- G11 - INFORMATION STORAGE

Alexey Kostinsky

Person

Patents Grantslast 30 patents

Programmable on-die termination timing in a multi-rank system

Interference testing

Programmable on-die termination timing in a multi-rank system

On-die termination control without a dedicated pin in a multi-rank...

On-die termination control without a dedicated pin in a multi-rank...

Interference testing

Avoiding DQS false sampling triggers

Training for command/address/control/clock delays under uncertain i...

Patents Applicationslast 30 patents

PROGRAMMABLE ON-DIE TERMINATION TIMING IN A MULTI-RANK SYSTEM

INTERFERENCE TESTING

ON-DIE TERMINATION CONTROL WITHOUT A DEDICATED PIN IN A MULTI-RANK...

PROGRAMMABLE ON-DIE TERMINATION TIMING IN A MULTI-RANK SYSTEM

ON-DIE TERMINATION CONTROL WITHOUT A DEDICATED PIN IN A MULTI-RANK...

INTERFERENCE TESTING

AVOIDING DQS FALSE SAMPLING TRIGGERS

TRAINING FOR MAPPING SWIZZLED DATA TO COMMAND/ADDRESS SIGNALS