Alfred E. Dunlop

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Murray Hill, NJ, US

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Patents Grantslast 30 patents

Information Patent Grant
Signal distribution scheme in field programmable gate array (FPGA)...
- Patent number 6,486,705
- Issue date Nov 26, 2002
- Lattice Semiconductor Corporation
- William B. Andrews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock recovery from a burst-mode digital signal each packet of whic...
- Patent number 6,259,326
- Issue date Jul 10, 2001
- Agere Systems Guardian Corp.
- Alfred Earl Dunlop
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock recovery circuit
- Patent number 5,757,872
- Issue date May 26, 1998
- Lucent Technologies Inc.
- Mihai Banu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Closed-loop frequency control of an oscillator circuit
- Patent number 5,528,199
- Issue date Jun 18, 1996
- AT&T Corp.
- Alfred E. Dunlop
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digitally controlled element sizing
- Patent number 5,298,800
- Issue date Mar 29, 1994
- AT&T Bell Laboratories
- Alfred E. Dunlop
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for clock recovery
- Patent number 5,237,290
- Issue date Aug 17, 1993
- AT&T Bell Laboratories
- Mihai Banu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digitally controlled element sizing
- Patent number 5,194,765
- Issue date Mar 16, 1993
- AT&T Bell Laboratories
- Alfred E. Dunlop
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Signal distribution scheme in field programmable gate array (FPGA)...
- Publication number 20020003445
- Publication date Jan 10, 2002
- William B. Andrews
- G06 - COMPUTING CALCULATING COUNTING