Ali Burney

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Mixed-mode multiplier using hard and soft logic circuitry
- Patent number 8,856,201
- Issue date Oct 7, 2014
- Altera Corporation
- Martin Langhammer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for optimizing design of a hard intellectual property bl...
- Patent number 7,843,216
- Issue date Nov 30, 2010
- Altera Corporation
- Darren van Wageningen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable logic device integrated circuit with dynamic phase ali...
- Patent number 7,715,467
- Issue date May 11, 2010
- Altera Corporation
- Ali Burney
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatus for control and configuration of programmable...
- Patent number 7,696,781
- Issue date Apr 13, 2010
- Altera Corporation
- Ali H Burney
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory interface circuitry with phase detection
- Patent number 7,664,978
- Issue date Feb 16, 2010
- Altera Corporation
- Ali Burney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device integrated circuits with configurable dyn...
- Patent number 7,644,296
- Issue date Jan 5, 2010
- Altera Corporation
- Ali Burney
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Techniques for generating programmable delays
- Patent number 7,639,054
- Issue date Dec 29, 2009
- Altera Corporation
- Ali Burney
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device integrated circuit with communications ch...
- Patent number 7,590,211
- Issue date Sep 15, 2009
- Altera Corporation
- Ali Burney
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Serializer-deserializer circuits formed from input-output circuit r...
- Patent number 7,587,537
- Issue date Sep 8, 2009
- Altera Corporation
- Ali Burney
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device integrated circuit with dynamic phase ali...
- Patent number 7,555,667
- Issue date Jun 30, 2009
- Altera Corporation
- Ali Burney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for control and configuration of programmable...
- Patent number 7,468,613
- Issue date Dec 23, 2008
- Altera Corporation
- Ali H Burney
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for optimizing design of a hard intellectual property bl...
- Patent number 7,434,192
- Issue date Oct 7, 2008
- Altera Corporation
- Darren van Wageningen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Modular I/O bank architecture
- Patent number 7,378,868
- Issue date May 27, 2008
- Altera Corporation
- Jeffrey Tyhach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Implementing crossbars and barrel shifters using multiplier-accumul...
- Patent number 7,343,388
- Issue date Mar 11, 2008
- Altera Corporation
- Ali H Burney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced DLL phase output scheme
- Patent number 7,282,973
- Issue date Oct 16, 2007
- Altera Corporation
- Sanjay K. Charagulla
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for control and configuration of programmable...
- Patent number 7,274,212
- Issue date Sep 25, 2007
- Altera Corporation
- Ali H Burney
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Embedded PCI-Express implementation
- Patent number 7,257,655
- Issue date Aug 14, 2007
- Altera Corporation
- Ali H. Burney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuits with reduced interconnect overhead
- Patent number 7,084,664
- Issue date Aug 1, 2006
- Alter Corporation
- Kwan Yee Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable crossbar switch
- Patent number 7,057,412
- Issue date Jun 6, 2006
- Altera Corporation
- Ali H Burney
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for generating parity values
- Patent number 6,981,206
- Issue date Dec 27, 2005
- Altera Corporation
- Ali Burney
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
TECHNIQUES FOR OPTIMIZING DESIGN OF A HARD INTELLECTUAL PROPERTY BL...
- Publication number 20080297192
- Publication date Dec 4, 2008
- Altera Corporation
- Darren van Wageningen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory interface circuitry with phase detection
- Publication number 20070240012
- Publication date Oct 11, 2007
- Ali Burney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR I/O BANK ARCHITECTURE
- Publication number 20070165478
- Publication date Jul 19, 2007
- Jeffrey Tyhach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Modular I/O bank architecture
- Publication number 20070164784
- Publication date Jul 19, 2007
- Altera Corporation
- Sanjay Charagulla
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Techniques for optimizing design of a hard intellectual property bl...
- Publication number 20060125517
- Publication date Jun 15, 2006
- Altera Corporation
- Darren van Wageningen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Mixed-mode multiplier using hard and soft logic circuitry

Techniques for optimizing design of a hard intellectual property bl...

Programmable logic device integrated circuit with dynamic phase ali...

Methods and apparatus for control and configuration of programmable...

Memory interface circuitry with phase detection

Programmable logic device integrated circuits with configurable dyn...

Techniques for generating programmable delays

Programmable logic device integrated circuit with communications ch...

Serializer-deserializer circuits formed from input-output circuit r...

Programmable logic device integrated circuit with dynamic phase ali...

Methods and apparatus for control and configuration of programmable...

Techniques for optimizing design of a hard intellectual property bl...

Modular I/O bank architecture

Implementing crossbars and barrel shifters using multiplier-accumul...

Enhanced DLL phase output scheme

Methods and apparatus for control and configuration of programmable...

Embedded PCI-Express implementation

Integrated circuits with reduced interconnect overhead

Configurable crossbar switch

Method and apparatus for generating parity values

Patents Applicationslast 30 patents

TECHNIQUES FOR OPTIMIZING DESIGN OF A HARD INTELLECTUAL PROPERTY BL...

Memory interface circuitry with phase detection

MODULAR I/O BANK ARCHITECTURE

Modular I/O bank architecture

Techniques for optimizing design of a hard intellectual property bl...