Ali Keshavarzi

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Embedded SONOS with triple gate oxide and manufacturing method of t...
- Patent number 10,062,573
- Issue date Aug 28, 2018
- Cypress Semiconductor Corporation
- Krishnaswamy Ramkumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits including semiconductiv...
- Patent number 8,962,421
- Issue date Feb 24, 2015
- GLOBALFOUNDRIES, INC.
- Gopal Srinivasan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Providing timing-closed FinFET designs from planar designs
- Patent number 8,689,154
- Issue date Apr 1, 2014
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic circuits using carbon nanotube transistors
- Patent number 8,513,741
- Issue date Aug 20, 2013
- Intel Corporation
- Ali Keshavarzi
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Methods of forming carbon nanotube transistors for high speed circu...
- Patent number 8,389,976
- Issue date Mar 5, 2013
- Intel Corporation
- Arijit Raychowdhury
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Capacitor, method of increasing a capacitance area of same, and sys...
- Patent number 8,138,042
- Issue date Mar 20, 2012
- Intel Corporation
- Brian S. Doyle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Logic circuits using carbon nanotube transistors
- Patent number 8,004,043
- Issue date Aug 23, 2011
- Intel Corporation
- Ali Keshavarzi
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Leakage compensation circuit for Dynamic Random Access Memory (DRAM...
- Patent number 7,961,498
- Issue date Jun 14, 2011
- Intel Corporation
- DiaaEldin S. Khalil
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitor, method of increasing a capacitance area of same, and sys...
- Patent number 7,859,081
- Issue date Dec 28, 2010
- Intel Corporation
- Brian S. Doyle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Carbon nanotube fuse element
- Patent number 7,787,292
- Issue date Aug 31, 2010
- Intel Corporation
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Grant
Floating-body dynamic random access memory and method of fabricatio...
- Patent number 7,514,746
- Issue date Apr 7, 2009
- Intel Corporation
- Stephen H. Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric memory cell
- Patent number 7,501,316
- Issue date Mar 10, 2009
- Intel Corporation
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Grant
2-transistor floating-body dram
- Patent number 7,391,640
- Issue date Jun 24, 2008
- Intel Corporation
- Stephen H. Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell without halo implant
- Patent number 7,355,246
- Issue date Apr 8, 2008
- Intel Corporation
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Grant
Non volatile data storage through dielectric breakdown
- Patent number 7,321,502
- Issue date Jan 22, 2008
- Intel Corporation
- Fabrice Paillet
- G11 - INFORMATION STORAGE
Information Patent Grant
Operating an information storage cell array
- Patent number 7,295,474
- Issue date Nov 13, 2007
- Intel Corporation
- Yibin Ye
- G11 - INFORMATION STORAGE
Information Patent Grant
CMOS radiation-measuring circuit with a variable threshold
- Patent number 7,288,752
- Issue date Oct 30, 2007
- Intel Corporation
- Ali Keshavarzi
- G01 - MEASURING TESTING
Information Patent Grant
Dual gate oxide one time programmable (OTP) antifuse cell
- Patent number 7,280,425
- Issue date Oct 9, 2007
- Intel Corporation
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Grant
Leakage current management
- Patent number 7,268,569
- Issue date Sep 11, 2007
- Intel Corporation
- Arman Vassighi
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitor structure for a logic process
- Patent number 7,262,107
- Issue date Aug 28, 2007
- Intel Corporation
- Stephen H. Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell driver circuits
- Patent number 7,236,410
- Issue date Jun 26, 2007
- Intel Corporation
- Gerhard Schrom
- G11 - INFORMATION STORAGE
Information Patent Grant
Purge-based floating body memory
- Patent number 7,230,846
- Issue date Jun 12, 2007
- Intel Corporation
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for programming a memory array
- Patent number 7,167,397
- Issue date Jan 23, 2007
- Intel Corporation
- Fabrice Paillet
- G11 - INFORMATION STORAGE
Information Patent Grant
1P1N 2T gain cell
- Patent number 7,123,500
- Issue date Oct 17, 2006
- Intel Corporation
- Yibin Ye
- G11 - INFORMATION STORAGE
Information Patent Grant
Two transistor gain cell, method, and system
- Patent number 7,120,072
- Issue date Oct 10, 2006
- Intel Corporation
- Yibin Ye
- G11 - INFORMATION STORAGE
Information Patent Grant
Crosspoint memory array utilizing one time programmable antifuse cells
- Patent number 7,110,278
- Issue date Sep 19, 2006
- Intel Corporation
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Grant
OTP antifuse cell and cell array
- Patent number 7,102,951
- Issue date Sep 5, 2006
- Intel Corporation
- Fabrice Paillet
- G11 - INFORMATION STORAGE
Information Patent Grant
Overvoltage detection apparatus, method, and system
- Patent number 7,102,358
- Issue date Sep 5, 2006
- Intel Corporation
- Ali Keshavarzi
- G01 - MEASURING TESTING
Information Patent Grant
Floating-body dynamic random access memory and method of fabricatio...
- Patent number 7,098,507
- Issue date Aug 29, 2006
- Intel Corporation
- Stephen H. Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for a one-phase write to a one-transistor memo...
- Patent number 7,075,821
- Issue date Jul 11, 2006
- Intel Corporation
- Yibin Ye
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
BIAS SCHEME FOR WORD PROGRAMMING IN NON-VOLATILE MEMORY AND INHIBIT...
- Publication number 20190147960
- Publication date May 16, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Gary Menezes
- G11 - INFORMATION STORAGE
Information Patent Application
EMBEDDED SONOS WITH TRIPLE GATE OXIDE AND MANUFACTURING METHOD OF T...
- Publication number 20190088487
- Publication date Mar 21, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Krishnaswamy Ramkumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING SEMICONDUCTIV...
- Publication number 20140134822
- Publication date May 15, 2014
- GLOBALFOUNDRIES, Inc.
- Gopal Srinivasan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROVIDING TIMING-CLOSED FINFET DESIGNS FROM PLANAR DESIGNS
- Publication number 20130275935
- Publication date Oct 17, 2013
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC CIRCUITS USING CARBON NANOTUBE TRANSISTORS
- Publication number 20120049890
- Publication date Mar 1, 2012
- Ali Keshavarzi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CAPACITOR, METHOD OF INCREASING A CAPACITANCE AREA OF SAME, AND SYS...
- Publication number 20110079837
- Publication date Apr 7, 2011
- Brian S. Doyle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of forming carbon nanotube transistors for high speed circu...
- Publication number 20100252812
- Publication date Oct 7, 2010
- Arijit Raychowdhury
- B82 - NANO-TECHNOLOGY
Information Patent Application
LEAKAGE COMPENSATION CIRCUIT FOR DYNAMIC RANDOM ACCESS MEMORY (DRAM...
- Publication number 20100073994
- Publication date Mar 25, 2010
- DiaaEldin S. Khalil
- G11 - INFORMATION STORAGE
Information Patent Application
Carbon nanotube fuse element
- Publication number 20090003028
- Publication date Jan 1, 2009
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Application
Capacitor, method of increasing a capacitance area of same, and sys...
- Publication number 20080237675
- Publication date Oct 2, 2008
- Brian S. Doyle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
On-chip memory cell and method of manufacturing same
- Publication number 20080237678
- Publication date Oct 2, 2008
- Suman Datta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOGIC CIRCUITS USING CARBON NANOTUBE TRANSISTORS
- Publication number 20080143389
- Publication date Jun 19, 2008
- Ali Keshavarzi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Statistical circuit design with carbon nanotubes
- Publication number 20070155065
- Publication date Jul 5, 2007
- Shekhar Y. Borkar
- B82 - NANO-TECHNOLOGY
Information Patent Application
Dual gate oxide one time programmable (OTP) antifuse cell
- Publication number 20070076463
- Publication date Apr 5, 2007
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Application
Operating an information storage cell array
- Publication number 20070002611
- Publication date Jan 4, 2007
- Yibin Ye
- G11 - INFORMATION STORAGE
Information Patent Application
Capacitor structure for a logic process
- Publication number 20070004162
- Publication date Jan 4, 2007
- Stephen H. Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory cell driver circuits
- Publication number 20060291265
- Publication date Dec 28, 2006
- Gerhard Schrom
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR PROGRAMMING A MEMORY ARRAY
- Publication number 20060285393
- Publication date Dec 21, 2006
- Fabrice Paillet
- G11 - INFORMATION STORAGE
Information Patent Application
Purge-based floating body memory
- Publication number 20060279985
- Publication date Dec 14, 2006
- Intel Corporation
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Application
Floating-body dynamic random access memory and method of fabricatio...
- Publication number 20060267093
- Publication date Nov 30, 2006
- Stephen H. Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
2-Transistor floating-body dram
- Publication number 20060187706
- Publication date Aug 24, 2006
- Intel Corporation
- Stephen H. Tang
- G11 - INFORMATION STORAGE
Information Patent Application
One time programmable memory
- Publication number 20060139995
- Publication date Jun 29, 2006
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Application
Leakage current management
- Publication number 20060140041
- Publication date Jun 29, 2006
- Arman Vassighi
- G11 - INFORMATION STORAGE
Information Patent Application
Floating-body dynamic random access memory with purge line
- Publication number 20060098482
- Publication date May 11, 2006
- Intel Corporation
- Stephen H. Tang
- G11 - INFORMATION STORAGE
Information Patent Application
OTP antifuse cell and cell array
- Publication number 20060092742
- Publication date May 4, 2006
- Fabrice Paillet
- G11 - INFORMATION STORAGE
Information Patent Application
Non volatile data storage through dielectric breakdown
- Publication number 20060071646
- Publication date Apr 6, 2006
- Fabrice Paillet
- G11 - INFORMATION STORAGE
Information Patent Application
Floating-body memory cell write
- Publication number 20060067126
- Publication date Mar 30, 2006
- Stephen H. Tang
- G11 - INFORMATION STORAGE
Information Patent Application
Crosspoint memory array utilizing one time programmable antifuse cells
- Publication number 20060067152
- Publication date Mar 30, 2006
- Ali Keshavarzi
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for a one-phase write to a one-transistor memo...
- Publication number 20060067133
- Publication date Mar 30, 2006
- Yibin Ye
- G11 - INFORMATION STORAGE
Information Patent Application
Memory cell without halo implant
- Publication number 20060054971
- Publication date Mar 16, 2006
- Ali Keshavarzi
- G11 - INFORMATION STORAGE

Ali Keshavarzi

Person

Patents Grantslast 30 patents

Embedded SONOS with triple gate oxide and manufacturing method of t...

Methods for fabricating integrated circuits including semiconductiv...

Providing timing-closed FinFET designs from planar designs

Logic circuits using carbon nanotube transistors

Methods of forming carbon nanotube transistors for high speed circu...

Capacitor, method of increasing a capacitance area of same, and sys...

Logic circuits using carbon nanotube transistors

Leakage compensation circuit for Dynamic Random Access Memory (DRAM...

Capacitor, method of increasing a capacitance area of same, and sys...

Carbon nanotube fuse element

Floating-body dynamic random access memory and method of fabricatio...

Asymmetric memory cell

2-transistor floating-body dram

Memory cell without halo implant

Non volatile data storage through dielectric breakdown

Operating an information storage cell array

CMOS radiation-measuring circuit with a variable threshold

Dual gate oxide one time programmable (OTP) antifuse cell

Leakage current management

Capacitor structure for a logic process

Memory cell driver circuits

Purge-based floating body memory

Apparatus and method for programming a memory array

1P1N 2T gain cell

Two transistor gain cell, method, and system

Crosspoint memory array utilizing one time programmable antifuse cells

OTP antifuse cell and cell array

Overvoltage detection apparatus, method, and system

Floating-body dynamic random access memory and method of fabricatio...

Apparatus and method for a one-phase write to a one-transistor memo...

Patents Applicationslast 30 patents

BIAS SCHEME FOR WORD PROGRAMMING IN NON-VOLATILE MEMORY AND INHIBIT...

EMBEDDED SONOS WITH TRIPLE GATE OXIDE AND MANUFACTURING METHOD OF T...

METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING SEMICONDUCTIV...

PROVIDING TIMING-CLOSED FINFET DESIGNS FROM PLANAR DESIGNS

LOGIC CIRCUITS USING CARBON NANOTUBE TRANSISTORS

CAPACITOR, METHOD OF INCREASING A CAPACITANCE AREA OF SAME, AND SYS...

Methods of forming carbon nanotube transistors for high speed circu...

LEAKAGE COMPENSATION CIRCUIT FOR DYNAMIC RANDOM ACCESS MEMORY (DRAM...

Carbon nanotube fuse element

Capacitor, method of increasing a capacitance area of same, and sys...

On-chip memory cell and method of manufacturing same

LOGIC CIRCUITS USING CARBON NANOTUBE TRANSISTORS

Statistical circuit design with carbon nanotubes

Dual gate oxide one time programmable (OTP) antifuse cell

Operating an information storage cell array

Capacitor structure for a logic process

Memory cell driver circuits

APPARATUS AND METHOD FOR PROGRAMMING A MEMORY ARRAY

Purge-based floating body memory

Floating-body dynamic random access memory and method of fabricatio...

2-Transistor floating-body dram

One time programmable memory

Leakage current management

Floating-body dynamic random access memory with purge line

OTP antifuse cell and cell array

Non volatile data storage through dielectric breakdown

Floating-body memory cell write

Crosspoint memory array utilizing one time programmable antifuse cells

Apparatus and method for a one-phase write to a one-transistor memo...

Memory cell without halo implant