Ali Nazemi

Person

Aliso Viejo, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Configurable prime number divider using multi-phase clocks
- Patent number 12,068,748
- Issue date Aug 20, 2024
- Avago Technologies International Sales Pte. Limited
- Lakshmi Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems for and methods of fractional frequency division
- Patent number 11,683,048
- Issue date Jun 20, 2023
- Avago Technologies International Sales Pte. Limited
- Ahmed Elkholy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Quadrature delay locked loops
- Patent number 10,931,288
- Issue date Feb 23, 2021
- Avago Technologies International Sales Pte. Limited
- Zhiyu Ru
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed transmitter including a multiplexer using multi-phase cl...
- Patent number 10,749,505
- Issue date Aug 18, 2020
- Avago Technologies International Sales Pte. Ltd.
- Lakshmi Rao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Quadrature delay locked loops
- Patent number 10,523,220
- Issue date Dec 31, 2019
- Avago Technologies International Sales Pte. Limited
- Zhiyu Ru
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-driver peaking technique for high-speed DACs
- Patent number 10,476,516
- Issue date Nov 12, 2019
- Avago Technologies International Sales Pte. Limited
- Kun Chuai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Clock skew suppression for time-interleaved clocks
- Patent number 10,277,210
- Issue date Apr 30, 2019
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Hyo Gyuem Rhew
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiplexer circuit for a digital to analog converter
- Patent number 10,069,508
- Issue date Sep 4, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Jiawen Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-segmented all logic DAC
- Patent number 10,014,877
- Issue date Jul 3, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Adesh Garg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time-interleaved high-speed digital-to-analog converter (DAC) archi...
- Patent number 9,685,969
- Issue date Jun 20, 2017
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Adesh Garg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-speed, low-power reconfigurable voltage-mode DAC-driver
- Patent number 9,413,381
- Issue date Aug 9, 2016
- Broadcom Corporation
- Anand Jitendra Vasani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase alignment architecture for ultra high-speed data path
- Patent number 9,344,268
- Issue date May 17, 2016
- Broadcom Corporation
- Ali Nazemi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Compact low-power fully digital CMOS clock generation apparatus for...
- Patent number 9,246,670
- Issue date Jan 26, 2016
- Broadcom Corporation
- Mahmoud Reza Ahmadi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High speed level shifter with amplitude servo loop
- Patent number 9,197,214
- Issue date Nov 24, 2015
- Broadcom Corporation
- Ali Nazemi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High bandwidth equalizer and limiting amplifier
- Patent number 9,136,904
- Issue date Sep 15, 2015
- Broadcom Corporation
- Tamer Ali
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Compact low-power fully digital CMOS clock generation apparatus for...
- Patent number 9,001,869
- Issue date Apr 7, 2015
- Broadcom Corporation
- Mahmoud Reza Ahmadi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Quasi-digital receiver for high speed SER-DES
- Patent number 8,958,501
- Issue date Feb 17, 2015
- Broadcom Corporation
- Ali Nazemi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
DSP reciever with high speed low BER ADC
- Patent number 8,836,553
- Issue date Sep 16, 2014
- Broadcom Corporation
- Bo Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Common mode termination with C-multiplier circuit
- Patent number 8,664,973
- Issue date Mar 4, 2014
- Broadcom Corporation
- Tamer Ali
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Compact high-speed mixed-signal interface
- Patent number 8,618,835
- Issue date Dec 31, 2013
- Broadcom Corporation
- Burak Catli
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Analog-to-digital converter
- Patent number 8,094,056
- Issue date Jan 10, 2012
- ClariPhy Communications, Inc.
- Ali Nazemi
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
SYSTEMS AND METHODS FOR QUADRATURE DELAY CLOCK GENERATION
- Publication number 20240427371
- Publication date Dec 26, 2024
- Avago Technologies International Sales Pte. Limited
- Tim Yee He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE PRIME NUMBER DIVIDER USING MULTI-PHASE CLOCKS
- Publication number 20240072770
- Publication date Feb 29, 2024
- Avago Technologies International Sales Pte. Limited
- Lakshmi RAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS FOR AND METHODS OF FRACTIONAL FREQUENCY DIVISION
- Publication number 20230268929
- Publication date Aug 24, 2023
- Avago Technologies International Sales Pte. Limited
- Ahmed Elkholy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS FOR AND METHODS OF FRACTIONAL FREQUENCY DIVISION
- Publication number 20220345152
- Publication date Oct 27, 2022
- Avago Technologies International Sales Pte. Limited
- Ahmed Elkholy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
QUADRATURE DELAY LOCKED LOOPS
- Publication number 20200304129
- Publication date Sep 24, 2020
- Avago Technologies International Sales Pte. Limited
- Zhiyu RU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH-SPEED TRANSMITTER INCLUDING A MULTIPLEXER USING MULTI-PHASE CL...
- Publication number 20200127645
- Publication date Apr 23, 2020
- Avago Technologies International Sales Pte. Ltd.
- Lakshmi Rao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CLOCK SKEW SUPPRESSION FOR TIME-INTERLEAVED CLOCKS
- Publication number 20190131958
- Publication date May 2, 2019
- Avago Technologies International Sales Pte. Limited
- Hyo Gyuem RHEW
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH-SPEED, LOW-POWER RECONFIGURABLE VOLTAGE-MODE DAC-DRIVER
- Publication number 20160182080
- Publication date Jun 23, 2016
- BROADCOM CORPORATION
- Anand Jitendra Vasani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPACT LOW-POWER FULLY DIGITAL CMOS CLOCK GENERATION APPARATUS FOR...
- Publication number 20150180649
- Publication date Jun 25, 2015
- BROADCOM CORPORATION
- Mahmoud Reza AHMADI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High Speed Level Shifter with Amplitude Servo Loop
- Publication number 20150035563
- Publication date Feb 5, 2015
- BROADCOM CORPORATION
- Ali Nazemi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPACT LOW-POWER FULLY DIGITAL CMOS CLOCK GENERATION APPARATUS FOR...
- Publication number 20140241442
- Publication date Aug 28, 2014
- Mahmoud Reza Ahmadi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
QUASI-DIGITAL RECEIVER FOR HIGH SPEED SER-DES
- Publication number 20140146922
- Publication date May 29, 2014
- BROADCOM CORPORATION
- Ali Nazemi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DSP RECEIVER WITH HIGH SPEED LOW BER ADC
- Publication number 20140104086
- Publication date Apr 17, 2014
- BROADCOM CORPORATION
- Bo Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMMON MODE TERMINATION WITH C-MULTIPLIER CIRCUIT
- Publication number 20140035696
- Publication date Feb 6, 2014
- BROADCOM CORPORATION
- Tamer ALI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High Bandwidth Equalizer and Limiting Amplifier
- Publication number 20140036982
- Publication date Feb 6, 2014
- BROADCOM CORPORATION
- Tamer ALI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Compact High-Speed Mixed-Signal Interface
- Publication number 20130076394
- Publication date Mar 28, 2013
- BROADCOM CORPORATION
- Burak Catli
- H03 - BASIC ELECTRONIC CIRCUITRY

Person

Patents Grantslast 30 patents

Configurable prime number divider using multi-phase clocks

Systems for and methods of fractional frequency division

Quadrature delay locked loops

High-speed transmitter including a multiplexer using multi-phase cl...

Quadrature delay locked loops

Pre-driver peaking technique for high-speed DACs

Clock skew suppression for time-interleaved clocks

Multiplexer circuit for a digital to analog converter

Multi-segmented all logic DAC

Time-interleaved high-speed digital-to-analog converter (DAC) archi...

High-speed, low-power reconfigurable voltage-mode DAC-driver

Phase alignment architecture for ultra high-speed data path

Compact low-power fully digital CMOS clock generation apparatus for...

High speed level shifter with amplitude servo loop

High bandwidth equalizer and limiting amplifier

Compact low-power fully digital CMOS clock generation apparatus for...

Quasi-digital receiver for high speed SER-DES

DSP reciever with high speed low BER ADC

Common mode termination with C-multiplier circuit

Compact high-speed mixed-signal interface

Analog-to-digital converter

Patents Applicationslast 30 patents

SYSTEMS AND METHODS FOR QUADRATURE DELAY CLOCK GENERATION

CONFIGURABLE PRIME NUMBER DIVIDER USING MULTI-PHASE CLOCKS

SYSTEMS FOR AND METHODS OF FRACTIONAL FREQUENCY DIVISION

SYSTEMS FOR AND METHODS OF FRACTIONAL FREQUENCY DIVISION

QUADRATURE DELAY LOCKED LOOPS

HIGH-SPEED TRANSMITTER INCLUDING A MULTIPLEXER USING MULTI-PHASE CL...

CLOCK SKEW SUPPRESSION FOR TIME-INTERLEAVED CLOCKS

HIGH-SPEED, LOW-POWER RECONFIGURABLE VOLTAGE-MODE DAC-DRIVER

COMPACT LOW-POWER FULLY DIGITAL CMOS CLOCK GENERATION APPARATUS FOR...

High Speed Level Shifter with Amplitude Servo Loop

COMPACT LOW-POWER FULLY DIGITAL CMOS CLOCK GENERATION APPARATUS FOR...

QUASI-DIGITAL RECEIVER FOR HIGH SPEED SER-DES

DSP RECEIVER WITH HIGH SPEED LOW BER ADC

COMMON MODE TERMINATION WITH C-MULTIPLIER CIRCUIT

High Bandwidth Equalizer and Limiting Amplifier

Compact High-Speed Mixed-Signal Interface