Ali Vahidsafa

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method for migrating CPU state from an inoperable core to a spare core
- Patent number 11,709,742
- Issue date Jul 25, 2023
- Oracle International Corporation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for migrating CPU state from an inoperable core to a spare core
- Patent number 11,263,012
- Issue date Mar 1, 2022
- Oracle International Corporation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Narrow-parallel scan-based device testing
- Patent number 10,656,205
- Issue date May 19, 2020
- Oracle International Corporation
- Mark Semmelmeyer
- G01 - MEASURING TESTING
Information Patent Grant
Method for migrating CPU state from an inoperable core to a spare core
- Patent number 10,528,351
- Issue date Jan 7, 2020
- Oracle International Corporation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault-tolerant cache coherence over a lossy network
- Patent number 10,467,139
- Issue date Nov 5, 2019
- Oracle International Corporation
- Paul N. Loewenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault-tolerant cache coherence over a lossy network
- Patent number 10,452,547
- Issue date Oct 22, 2019
- Oracle International Corporation
- Paul N. Loewenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed functional test vectors in low power test conditions of...
- Patent number 10,248,520
- Issue date Apr 2, 2019
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cycle deterministic functional testing of a chip with asynchronous...
- Patent number 10,073,139
- Issue date Sep 11, 2018
- Oracle International Corporation
- Ali Vahidsafa
- G01 - MEASURING TESTING
Information Patent Grant
Inter-processor bus link and switch chip failure recovery
- Patent number 10,007,629
- Issue date Jun 26, 2018
- Oracle International Corporation
- Thomas Wicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed mechanism for clock and reset control in a microprocessor
- Patent number 9,864,604
- Issue date Jan 9, 2018
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Drift compensation for a real time clock circuit
- Patent number 9,746,876
- Issue date Aug 29, 2017
- Oracle International Corporation
- Ali Vahidsafa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for migrating CPU state from an inoperable core to a spare core
- Patent number 9,710,273
- Issue date Jul 18, 2017
- Oracle International Corporation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing failed memory modules
- Patent number 9,645,903
- Issue date May 9, 2017
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simultaneous transition testing of different clock domains in a dig...
- Patent number 9,632,141
- Issue date Apr 25, 2017
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory migration in presence of live memory traffic
- Patent number 9,569,322
- Issue date Feb 14, 2017
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rotational synchronizer circuit for metastablity resolution
- Patent number 9,509,317
- Issue date Nov 29, 2016
- Oracle International Corporation
- Robert P Masleid
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for removal of a cache agent
- Patent number 9,460,013
- Issue date Oct 4, 2016
- Oracle International Corporation
- David Richard Smentek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mixing of low speed and high speed clocks to improve test precision...
- Patent number 9,404,967
- Issue date Aug 2, 2016
- Oracle International Corporation
- Ali Vahidsafa
- G01 - MEASURING TESTING
Information Patent Grant
Unified tool for automatic design constraints generation and verifi...
- Patent number 9,355,211
- Issue date May 31, 2016
- Oracle International Corporation
- Yibin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for retiring and unretiring cache lines
- Patent number 9,323,600
- Issue date Apr 26, 2016
- Oracle International Corporation
- Ramaswamy Sivaramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for distributed generation of multiple configu...
- Patent number 9,218,018
- Issue date Dec 22, 2015
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for consistent core hang detection in a a processor core
- Patent number 9,052,911
- Issue date Jun 9, 2015
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interrupt processing unit for preventing interrupt loss
- Patent number 9,026,705
- Issue date May 5, 2015
- Oracle International Corporation
- John R. Feehrer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid hardwired/programmable reset sequence controller
- Patent number 9,015,460
- Issue date Apr 21, 2015
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Constant frequency architectural timer in a dynamic clock domain
- Patent number 8,990,606
- Issue date Mar 24, 2015
- Oracle International Corporation
- Sebastian Turullols
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for synchronizing the time reference of a dyna...
- Patent number 8,972,767
- Issue date Mar 3, 2015
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combo static flop with full test
- Patent number 8,943,375
- Issue date Jan 27, 2015
- Oracle International Corporation
- Robert P. Masleid
- G11 - INFORMATION STORAGE
Information Patent Grant
Combo dynamic flop with scan
- Patent number 8,904,254
- Issue date Dec 2, 2014
- Oracle International Corporation
- Robert P. Masleid
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods for retiring and unretiring cache lines
- Patent number 8,839,025
- Issue date Sep 16, 2014
- Oracle International Corporation
- Ramaswamy Sivaramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wide-range glitch-free asynchronous clock switch
- Patent number 8,729,947
- Issue date May 20, 2014
- Oracle International Corporation
- Changku Hwang
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE
- Publication number 20230418715
- Publication date Dec 28, 2023
- Oracle International Corpoation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE
- Publication number 20220156075
- Publication date May 19, 2022
- ORACLE INTERNATIONAL CORPORATION
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE
- Publication number 20200210185
- Publication date Jul 2, 2020
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NARROW-PARALLEL SCAN-BASED DEVICE TESTING
- Publication number 20190235023
- Publication date Aug 1, 2019
- Oracle International Corporation
- MARK SEMMELMEYER
- G01 - MEASURING TESTING
Information Patent Application
FAULT-TOLERANT CACHE COHERENCE OVER A LOSSY NETWORK
- Publication number 20190207714
- Publication date Jul 4, 2019
- ORACLE INTERNATIONAL CORPORATION
- PAUL N. LOEWENSTEIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT-TOLERANT CACHE COHERENCE OVER A LOSSY NETWORK
- Publication number 20190205252
- Publication date Jul 4, 2019
- ORACLE INTERNATIONAL CORPORATION
- PAUL N. LOEWENSTEIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE
- Publication number 20170293539
- Publication date Oct 12, 2017
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH SPEED FUNCTIONAL TEST VECTORS IN LOW POWER TEST CONDITIONS OF...
- Publication number 20170091059
- Publication date Mar 30, 2017
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED MECHANISM FOR CLOCK AND RESET CONTROL IN A MICROPROCESSOR
- Publication number 20160357571
- Publication date Dec 8, 2016
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTER-PROCESSOR BUS LINK AND SWITCH CHIP FAILURE RECOVERY
- Publication number 20160210255
- Publication date Jul 21, 2016
- Thomas Wicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIFT COMPENSATION FOR A REAL TIME CLOCK CIRCUIT
- Publication number 20160195894
- Publication date Jul 7, 2016
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE
- Publication number 20160147534
- Publication date May 26, 2016
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MIXING OF LOW SPEED AND HIGH SPEED CLOCKS TO IMPROVE TEST PRECISION...
- Publication number 20160131711
- Publication date May 12, 2016
- Oracle International Corporation
- Ali Vahidsafa
- G01 - MEASURING TESTING
Information Patent Application
UNIFIED TOOL FOR AUTOMATIC DESIGN CONSTRAINTS GENERATION AND VERIFI...
- Publication number 20160103943
- Publication date Apr 14, 2016
- ORACLE INTERNATIONAL CORPORATION
- Yibin XIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CYCLE DETERMINISTIC FUNCTIONAL TESTING OF A CHIP WITH ASYNCHRONOUS...
- Publication number 20160091565
- Publication date Mar 31, 2016
- Oracle International Corporation
- Ali Vahidsafa
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND SYSTEM FOR REMOVAL OF A CACHE AGENT
- Publication number 20160070646
- Publication date Mar 10, 2016
- ORACLE INTERNATIONAL CORPORATION
- David Richard Smentek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMULTANEOUS TRANSITION TESTING OF DIFFERENT CLOCK DOMAINS IN A DIG...
- Publication number 20150377960
- Publication date Dec 31, 2015
- Oracle International Corporation
- Ali Vahidsafa
- G01 - MEASURING TESTING
Information Patent Application
MANAGING MEMORY MODULES
- Publication number 20150278053
- Publication date Oct 1, 2015
- ORACLE INTERNATIONAL CORPORATION
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MIGRATION IN PRESENCE OF LIVE MEMORY TRAFFIC
- Publication number 20150278109
- Publication date Oct 1, 2015
- ORACLE INTERNATIONAL CORPORATION
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Retiring and Unretiring Cache Lines
- Publication number 20150039938
- Publication date Feb 5, 2015
- Oracle International Corporation
- Ramaswamy Sivaramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rotational Synchronizer Circuit for Metastablity Resolution
- Publication number 20140210526
- Publication date Jul 31, 2014
- Oracle International Corporation
- Robert P. Masleid
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR SYNCHRONIZING THE TIME REFERENCE OF A DYNA...
- Publication number 20140143580
- Publication date May 22, 2014
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBO DYNAMIC FLOP WITH SCAN
- Publication number 20140136912
- Publication date May 15, 2014
- ORACLE INTERNATIONAL CORPORATION
- Robert P. Masleid
- G01 - MEASURING TESTING
Information Patent Application
TESTING OF SRAMS
- Publication number 20140136909
- Publication date May 15, 2014
- ORACLE INTERNATIONAL CORPORATION
- Ali VAHIDSAFA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR DISTRIBUTED GENERATION OF MULTIPLE CONFIGU...
- Publication number 20140082396
- Publication date Mar 20, 2014
- Oracle International Corporation
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WIDE-RANGE GLITCH-FREE ASYNCHRONOUS CLOCK SWITCH
- Publication number 20140062548
- Publication date Mar 6, 2014
- Changku Hwang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MECHANISM FOR CONSISTENT CORE HANG DETECTION IN A PROCESSOR CORE
- Publication number 20140052966
- Publication date Feb 20, 2014
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERRUPT PROCESSING UNIT FOR PREVENTING INTERRUPT LOSS
- Publication number 20140047151
- Publication date Feb 13, 2014
- John R. Feehrer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBO STATIC FLOP WITH FULL TEST
- Publication number 20140047284
- Publication date Feb 13, 2014
- ORACLE INTERNATIONAL CORPORATION
- Robert P. Masleid
- G11 - INFORMATION STORAGE
Information Patent Application
HYBRID HARDWIRED/PROGRAMMABLE RESET SEQUENCE CONTROLLER
- Publication number 20140032887
- Publication date Jan 30, 2014
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING

Ali Vahidsafa

Person

Patents Grantslast 30 patents

Method for migrating CPU state from an inoperable core to a spare core

Method for migrating CPU state from an inoperable core to a spare core

Narrow-parallel scan-based device testing

Method for migrating CPU state from an inoperable core to a spare core

Fault-tolerant cache coherence over a lossy network

Fault-tolerant cache coherence over a lossy network

High speed functional test vectors in low power test conditions of...

Cycle deterministic functional testing of a chip with asynchronous...

Inter-processor bus link and switch chip failure recovery

Distributed mechanism for clock and reset control in a microprocessor

Drift compensation for a real time clock circuit

Method for migrating CPU state from an inoperable core to a spare core

Managing failed memory modules

Simultaneous transition testing of different clock domains in a dig...

Memory migration in presence of live memory traffic

Rotational synchronizer circuit for metastablity resolution

Method and system for removal of a cache agent

Mixing of low speed and high speed clocks to improve test precision...

Unified tool for automatic design constraints generation and verifi...

Systems and methods for retiring and unretiring cache lines

Method and apparatus for distributed generation of multiple configu...

Mechanism for consistent core hang detection in a a processor core

Interrupt processing unit for preventing interrupt loss

Hybrid hardwired/programmable reset sequence controller

Constant frequency architectural timer in a dynamic clock domain

Method and apparatus for synchronizing the time reference of a dyna...

Combo static flop with full test

Combo dynamic flop with scan

Systems and methods for retiring and unretiring cache lines

Wide-range glitch-free asynchronous clock switch

Patents Applicationslast 30 patents

METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE

METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE

METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE

NARROW-PARALLEL SCAN-BASED DEVICE TESTING

FAULT-TOLERANT CACHE COHERENCE OVER A LOSSY NETWORK

FAULT-TOLERANT CACHE COHERENCE OVER A LOSSY NETWORK

METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE

HIGH SPEED FUNCTIONAL TEST VECTORS IN LOW POWER TEST CONDITIONS OF...

DISTRIBUTED MECHANISM FOR CLOCK AND RESET CONTROL IN A MICROPROCESSOR

INTER-PROCESSOR BUS LINK AND SWITCH CHIP FAILURE RECOVERY

DRIFT COMPENSATION FOR A REAL TIME CLOCK CIRCUIT

METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE

MIXING OF LOW SPEED AND HIGH SPEED CLOCKS TO IMPROVE TEST PRECISION...

UNIFIED TOOL FOR AUTOMATIC DESIGN CONSTRAINTS GENERATION AND VERIFI...

CYCLE DETERMINISTIC FUNCTIONAL TESTING OF A CHIP WITH ASYNCHRONOUS...

METHOD AND SYSTEM FOR REMOVAL OF A CACHE AGENT

SIMULTANEOUS TRANSITION TESTING OF DIFFERENT CLOCK DOMAINS IN A DIG...

MANAGING MEMORY MODULES

MEMORY MIGRATION IN PRESENCE OF LIVE MEMORY TRAFFIC

Systems and Methods for Retiring and Unretiring Cache Lines

Rotational Synchronizer Circuit for Metastablity Resolution

METHOD AND APPARATUS FOR SYNCHRONIZING THE TIME REFERENCE OF A DYNA...

COMBO DYNAMIC FLOP WITH SCAN

TESTING OF SRAMS

METHOD AND APPARATUS FOR DISTRIBUTED GENERATION OF MULTIPLE CONFIGU...

WIDE-RANGE GLITCH-FREE ASYNCHRONOUS CLOCK SWITCH

MECHANISM FOR CONSISTENT CORE HANG DETECTION IN A PROCESSOR CORE

INTERRUPT PROCESSING UNIT FOR PREVENTING INTERRUPT LOSS

COMBO STATIC FLOP WITH FULL TEST

HYBRID HARDWIRED/PROGRAMMABLE RESET SEQUENCE CONTROLLER