Aliasger Zaidy

Person

West Lafayette, IN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Signal routing between memory die and logic die
- Patent number 12,165,696
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Sean S. Eilert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Discovery of hardware characteristics of deep learning accelerators...
- Patent number 12,118,460
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Aliasger Tayeb Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device for wafer-on-wafer formed memory and logic
- Patent number 12,112,792
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Glen E. Hush
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal routing between memory die and logic die for mode based oper...
- Patent number 12,112,793
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Aliasger T. Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching techniques for deep learning accelerator
- Patent number 12,094,531
- Issue date Sep 17, 2024
- Micron Technology, Inc.
- Aliasger Tayeb Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delta predictions for page scheduling
- Patent number 12,007,899
- Issue date Jun 11, 2024
- Micron Technology, Inc.
- Aliasger Tayeb Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wafer-on-wafer formed memory and logic for genomic annotations
- Patent number 11,915,742
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Sean S. Eilert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deep neural networks compiler for a trace-based accelerator
- Patent number 11,861,337
- Issue date Jan 2, 2024
- Micron Technology, Inc.
- Andre Xian Ming Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data migration schedule prediction using machine learning
- Patent number 11,829,627
- Issue date Nov 28, 2023
- Micron Technology, Inc.
- David Andrew Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware accelerator for convolutional neural networks and method o...
- Patent number 11,775,313
- Issue date Oct 3, 2023
- Purdue Research Foundation
- Eugenio Culurciello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inference engine circuit architecture
- Patent number 11,675,624
- Issue date Jun 13, 2023
- Micron Technology, Inc.
- Aliasger Zaidy
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE
- Publication number 20250104761
- Publication date Mar 27, 2025
- Micron Technology, Inc.
- Sean S. Eilert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISCOVERY OF HARDWARE CHARACTERISTICS OF DEEP LEARNING ACCELERATORS...
- Publication number 20250036950
- Publication date Jan 30, 2025
- Micron Technology, Inc.
- Aliasger Tayeb Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR MODE BASED OPER...
- Publication number 20250006251
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Aliasger T. Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Caching Techniques for Deep Learning Accelerator
- Publication number 20240428853
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Aliasger Tayeb Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE FOR WAFER-ON-WAFER FORMED MEMORY AND LOGIC
- Publication number 20240420757
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Glen E. Hush
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELTA PREDICTIONS FOR PAGE SCHEDULING
- Publication number 20240330190
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Aliasger Tayeb Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEEP LEARNING ACCELERATION WITH MIXED PRECISION
- Publication number 20230206041
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Sen MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEEP LEARNING ACCELERATION WITH MIXED PRECISION
- Publication number 20230206045
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Sen MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEEP LEARNING ACCELERATION WITH MIXED PRECISION
- Publication number 20230206043
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Sen MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEEP LEARNING ACCELERATION WITH MIXED PRECISION
- Publication number 20230206044
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Sen MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEEP LEARNING ACCELERATION WITH MIXED PRECISION
- Publication number 20230206046
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Sen MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEEP LEARNING ACCELERATION WITH MIXED PRECISION
- Publication number 20230206061
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Sen MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEEP LEARNING ACCELERATION WITH MIXED PRECISION
- Publication number 20230206042
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Sen MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELTA PREDICTIONS FOR PAGE SCHEDULING
- Publication number 20230100328
- Publication date Mar 30, 2023
- Micron Technology, Inc.
- Aliasger Tayeb Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA MIGRATION SCHEDULE PREDICTION USING MACHINE LEARNING
- Publication number 20230051103
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- David Andrew Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE
- Publication number 20230046050
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Sean S. Eilert
- G11 - INFORMATION STORAGE
Information Patent Application
FORMATION OF MEMORY DIE AND LOGIC DIE WITH WAFER-ON-WAFER BOND
- Publication number 20230049683
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Kunal R. Parekh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE FOR WAFER-ON-WAFER FORMED MEMORY AND LOGIC
- Publication number 20230051863
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Glen E. Hush
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR MODE BASED OPER...
- Publication number 20230051480
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Aliasger T. Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INPUT/OUTPUT CONNECTIONS OF WAFER-ON-WAFER BONDED MEMORY AND LOGIC
- Publication number 20230048628
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Kunal R. Parekh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER-ON-WAFER FORMED MEMORY AND LOGIC
- Publication number 20230048855
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Sean S. Eilert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DIE AND LOGIC DIE WITH WAFER-ON-WAFER BOND
- Publication number 20230048103
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Kunal R. Parekh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER-ON-WAFER FORMED MEMORY AND LOGIC FOR GENOMIC ANNOTATIONS
- Publication number 20230050961
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Sean S. Eilert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TESTING MEMORY OF WAFER-ON-WAFER BONDED MEMORY AND LOGIC
- Publication number 20230051235
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Kunal R. Parekh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR PERFORMING OPER...
- Publication number 20230051126
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Aliasger T. Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Caching Techniques for Deep Learning Accelerator
- Publication number 20220223201
- Publication date Jul 14, 2022
- Micron Technology, Inc.
- Aliasger Tayeb Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPILER WITH AN ARTIFICIAL NEURAL NETWORK TO OPTIMIZE INSTRUCTIONS...
- Publication number 20220147812
- Publication date May 12, 2022
- Micron Technology, Inc.
- Andre Xian Ming Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISCOVERY OF HARDWARE CHARACTERISTICS OF DEEP LEARNING ACCELERATORS...
- Publication number 20220147810
- Publication date May 12, 2022
- Micron Technology, Inc.
- Aliasger Tayeb Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RUNTIME OPTIMIZATION OF COMPUTATIONS OF AN ARTIFICIAL NEURAL NETWOR...
- Publication number 20220147813
- Publication date May 12, 2022
- Micron Technology, Inc.
- Andre Xian Ming Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENT THE COMPUTATION OF AN ARTIFICIAL NEURAL NETWORK USING MUL...
- Publication number 20220147811
- Publication date May 12, 2022
- Micron Technology, Inc.
- Jaime Cummins
- G06 - COMPUTING CALCULATING COUNTING

Aliasger Zaidy

Person

Patents Grantslast 30 patents

Signal routing between memory die and logic die

Discovery of hardware characteristics of deep learning accelerators...

Memory device for wafer-on-wafer formed memory and logic

Signal routing between memory die and logic die for mode based oper...

Caching techniques for deep learning accelerator

Delta predictions for page scheduling

Wafer-on-wafer formed memory and logic for genomic annotations

Deep neural networks compiler for a trace-based accelerator

Data migration schedule prediction using machine learning

Hardware accelerator for convolutional neural networks and method o...

Inference engine circuit architecture

Patents Applicationslast 30 patents

SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE

DISCOVERY OF HARDWARE CHARACTERISTICS OF DEEP LEARNING ACCELERATORS...

SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR MODE BASED OPER...

Caching Techniques for Deep Learning Accelerator

MEMORY DEVICE FOR WAFER-ON-WAFER FORMED MEMORY AND LOGIC

DELTA PREDICTIONS FOR PAGE SCHEDULING

DEEP LEARNING ACCELERATION WITH MIXED PRECISION

DEEP LEARNING ACCELERATION WITH MIXED PRECISION

DEEP LEARNING ACCELERATION WITH MIXED PRECISION

DEEP LEARNING ACCELERATION WITH MIXED PRECISION

DEEP LEARNING ACCELERATION WITH MIXED PRECISION

DEEP LEARNING ACCELERATION WITH MIXED PRECISION

DEEP LEARNING ACCELERATION WITH MIXED PRECISION

DELTA PREDICTIONS FOR PAGE SCHEDULING

DATA MIGRATION SCHEDULE PREDICTION USING MACHINE LEARNING

SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE

FORMATION OF MEMORY DIE AND LOGIC DIE WITH WAFER-ON-WAFER BOND

MEMORY DEVICE FOR WAFER-ON-WAFER FORMED MEMORY AND LOGIC

SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR MODE BASED OPER...

INPUT/OUTPUT CONNECTIONS OF WAFER-ON-WAFER BONDED MEMORY AND LOGIC

WAFER-ON-WAFER FORMED MEMORY AND LOGIC

MEMORY DIE AND LOGIC DIE WITH WAFER-ON-WAFER BOND

WAFER-ON-WAFER FORMED MEMORY AND LOGIC FOR GENOMIC ANNOTATIONS

TESTING MEMORY OF WAFER-ON-WAFER BONDED MEMORY AND LOGIC

SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR PERFORMING OPER...

Caching Techniques for Deep Learning Accelerator

COMPILER WITH AN ARTIFICIAL NEURAL NETWORK TO OPTIMIZE INSTRUCTIONS...

DISCOVERY OF HARDWARE CHARACTERISTICS OF DEEP LEARNING ACCELERATORS...

RUNTIME OPTIMIZATION OF COMPUTATIONS OF AN ARTIFICIAL NEURAL NETWOR...

IMPLEMENT THE COMPUTATION OF AN ARTIFICIAL NEURAL NETWORK USING MUL...