Alisa Yurovsky

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Pittsburgh, PA, US

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Patents Grantslast 30 patents

Information Patent Grant
Optimizing circuit layouts by configuring rooms for placing devices
- Patent number 8,527,928
- Issue date Sep 3, 2013
- Cadence Design Systems, Inc.
- Prakash Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Registry for electronic design automation of integrated circuits
- Patent number 7,945,890
- Issue date May 17, 2011
- Cadence Design Systems, Inc.
- Regis Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing circuit layouts by configuring rooms for placing devices
- Patent number 7,665,054
- Issue date Feb 16, 2010
- Cadence Design Systems, Inc.
- Prakash Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
REGISTRY FOR ELECTRONIC DESIGN AUTOMATION OF INTEGRATED CIRCUITS
- Publication number 20090113369
- Publication date Apr 30, 2009
- Cadence Design Systems, Inc.
- Regis Colwell
- G06 - COMPUTING CALCULATING COUNTING