Allan D. Knies

Person

Burlingame, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Way partitioning for a system-level cache
- Patent number 11,620,243
- Issue date Apr 4, 2023
- Google LLC
- Vinod Chamarty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Way partitioning for a system-level cache
- Patent number 10,884,959
- Issue date Jan 5, 2021
- Google LLC
- Vinod Chamarty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for efficiently implementing a processor pipeline
- Patent number 10,409,763
- Issue date Sep 10, 2019
- Intel Corporation
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system architecture
- Patent number 10,089,239
- Issue date Oct 2, 2018
- Google LLC
- Allan D. Knies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collective communications apparatus and method for parallel systems
- Patent number 9,477,628
- Issue date Oct 25, 2016
- Intel Corporation
- Allan D. Knies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System of improved loop detection and execution
- Patent number 9,459,871
- Issue date Oct 4, 2016
- Intel Corporation
- Masha Lipshits
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to provide failure detection
- Patent number 9,459,949
- Issue date Oct 4, 2016
- Intel Corporation
- Joshua Bruce Fryman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherency and processor consistency
- Patent number 9,195,465
- Issue date Nov 24, 2015
- Intel Corporation
- Varun K. Mohandru
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to provide failure detection
- Patent number 8,832,505
- Issue date Sep 9, 2014
- Intel Corporation
- Joshua Bruce Fryman
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
WAY PARTITIONING FOR A SYSTEM-LEVEL CACHE
- Publication number 20210255972
- Publication date Aug 19, 2021
- Google LLC
- Vinod Chamarty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM-LEVEL CACHE
- Publication number 20200257639
- Publication date Aug 13, 2020
- Google LLC
- Vinod Chamarty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM ARCHITECTURE
- Publication number 20160350232
- Publication date Dec 1, 2016
- Google Inc.
- Allan D. KNIES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR EFFICIENTLY IMPLEMENTING A PROCESSOR PIPELINE
- Publication number 20150378731
- Publication date Dec 31, 2015
- PATRICK P. LAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COLLECTIVE COMMUNICATIONS APPARATUS AND METHOD FOR PARALLEL SYSTEMS
- Publication number 20150095542
- Publication date Apr 2, 2015
- Allan D. Knies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO PROVIDE FAILURE DETECTION
- Publication number 20150089302
- Publication date Mar 26, 2015
- Joshua Bruce Fryman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM OF IMPROVED LOOP DETECTION AND EXECUTION
- Publication number 20140189331
- Publication date Jul 3, 2014
- Maria Lipshits
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE COHERENCY AND PROCESSOR CONSISTENCY
- Publication number 20140189253
- Publication date Jul 3, 2014
- Varun K. MOHANDRU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO PROVIDE FAILURE DETECTION
- Publication number 20140006870
- Publication date Jan 2, 2014
- Joshua Bruce Fryman
- G06 - COMPUTING CALCULATING COUNTING

Allan D. Knies

Person

Patents Grantslast 30 patents

Way partitioning for a system-level cache

Way partitioning for a system-level cache

Apparatus and method for efficiently implementing a processor pipeline

Memory system architecture

Collective communications apparatus and method for parallel systems

System of improved loop detection and execution

Methods and apparatus to provide failure detection

Cache coherency and processor consistency

Methods and apparatus to provide failure detection

Patents Applicationslast 30 patents

WAY PARTITIONING FOR A SYSTEM-LEVEL CACHE

SYSTEM-LEVEL CACHE

MEMORY SYSTEM ARCHITECTURE

APPARATUS AND METHOD FOR EFFICIENTLY IMPLEMENTING A PROCESSOR PIPELINE

COLLECTIVE COMMUNICATIONS APPARATUS AND METHOD FOR PARALLEL SYSTEMS

METHODS AND APPARATUS TO PROVIDE FAILURE DETECTION

SYSTEM OF IMPROVED LOOP DETECTION AND EXECUTION

CACHE COHERENCY AND PROCESSOR CONSISTENCY

METHODS AND APPARATUS TO PROVIDE FAILURE DETECTION