Allen W. Roberts

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Union City, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Software invalidation in a multiple level, multiple cache system
- Patent number 5,699,551
- Issue date Dec 16, 1997
- Silicon Graphics, Inc.
- George S. Taylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory system employing virtual address primary instruction a...
- Patent number 5,542,062
- Issue date Jul 30, 1996
- Silicon Graphics, Inc.
- George S. Taylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-level cache memory system
- Patent number 5,307,477
- Issue date Apr 26, 1994
- MIPS Computer Systems, Inc.
- George S. Taylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Differential bus with specified default value
- Patent number 5,056,110
- Issue date Oct 8, 1991
- MIPS Computer Systems, Inc.
- Timonty S. Fu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High speed data bus system
- Patent number 4,481,625
- Issue date Nov 6, 1984
- Elxsi
- Allen W. Roberts
- G06 - COMPUTING CALCULATING COUNTING