Alok Gupta

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 12,136,452
- Issue date Nov 5, 2024
- RAMBUS INC.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 11,682,448
- Issue date Jun 20, 2023
- RAMBUS INC.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 11,404,103
- Issue date Aug 2, 2022
- RAMBUS INC.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management systems and methods
- Patent number 11,256,568
- Issue date Feb 22, 2022
- NVIDIA Corporation
- Bruce Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management systems and methods using a management communicat...
- Patent number 10,783,950
- Issue date Sep 22, 2020
- NVIDIA Corporation
- Alok Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 10,607,685
- Issue date Mar 31, 2020
- Rambus Inc.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management systems and methods
- Patent number 10,528,423
- Issue date Jan 7, 2020
- NVIDIA Corporation
- Bruce Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller-based memory scrub for DRAMs with internal error-correct...
- Patent number 10,445,177
- Issue date Oct 15, 2019
- NVIDIA Corporation
- David Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 10,304,517
- Issue date May 28, 2019
- Rambus, Inc.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller-based memory scrub for DRAMs with internal error-correct...
- Patent number 10,049,006
- Issue date Aug 14, 2018
- NVIDIA Corporation
- David Reed
- G11 - INFORMATION STORAGE
Information Patent Grant
Address bit remapping scheme to reduce access granularity of DRAM a...
- Patent number 10,020,036
- Issue date Jul 10, 2018
- NVIDIA Corporation
- Alok Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 9,881,662
- Issue date Jan 30, 2018
- Rambus Inc.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for scrubbing and correcting DRAM memory data with internal...
- Patent number 9,880,900
- Issue date Jan 30, 2018
- NVIDIA Corporation
- David Reed
- G11 - INFORMATION STORAGE
Information Patent Grant
Time-multiplexed communication protocol for transmitting a command...
- Patent number 9,830,958
- Issue date Nov 28, 2017
- NVIDIA Corporation
- Alok Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for memory scrub of DRAM with internal error correcting code...
- Patent number 9,823,964
- Issue date Nov 21, 2017
- NVIDIA Corporation
- David Reed
- G11 - INFORMATION STORAGE
Information Patent Grant
Time-multiplexed communication protocol for transmitting a command...
- Patent number 9,646,656
- Issue date May 9, 2017
- NVIDIA Corporation
- Alok Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 9,552,865
- Issue date Jan 24, 2017
- Rambus Inc.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device formed with a semiconductor interposer
- Patent number 9,361,254
- Issue date Jun 7, 2016
- NVIDIA Corporation
- Alok Gupta
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
System and method for calibration of serial links using a serial-to...
- Patent number 9,330,031
- Issue date May 3, 2016
- NVIDIA Corporation
- Alok Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient command mapping scheme for short data burst length memory...
- Patent number 9,263,106
- Issue date Feb 16, 2016
- NVIDIA Corporation
- Alok Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 9,263,103
- Issue date Feb 16, 2016
- Rambus Inc.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 9,177,632
- Issue date Nov 3, 2015
- Rambus Inc.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 9,165,638
- Issue date Oct 20, 2015
- Rambus Inc.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 9,142,281
- Issue date Sep 22, 2015
- Rambus Inc.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller and a dynamic random access memory interface
- Patent number 8,738,852
- Issue date May 27, 2014
- NVIDIA Corporation
- Alok Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for calibrating write timing in a memory system
- Patent number 8,407,441
- Issue date Mar 26, 2013
- Rambus Inc.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20230410880
- Publication date Dec 21, 2023
- Rambus Inc.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20220366960
- Publication date Nov 17, 2022
- Rambus Inc.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20200349996
- Publication date Nov 5, 2020
- RAMBUS INC.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MANAGEMENT SYSTEMS AND METHODS
- Publication number 20200089568
- Publication date Mar 19, 2020
- NVIDIA Corporation
- Bruce Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20190371387
- Publication date Dec 5, 2019
- RAMBUS INC.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Classification for Asymmetric Error Costs
- Publication number 20190294612
- Publication date Sep 26, 2019
- Alok Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLER-BASED MEMORY SCRUB FOR DRAMS WITH INTERNAL ERROR-CORRECT...
- Publication number 20180314591
- Publication date Nov 1, 2018
- NVIDIA Corporation
- David Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20180218764
- Publication date Aug 2, 2018
- RAMBUS INC.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20170200489
- Publication date Jul 13, 2017
- RAMBUS INC.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLER-BASED MEMORY SCRUB FOR DRAMS WITH INTERNAL ERROR-CORRECT...
- Publication number 20170161143
- Publication date Jun 8, 2017
- NVIDIA Corporation
- David Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MEMORY SCRUB OF DRAM WITH INTERNAL ERROR CORRECTING CODE...
- Publication number 20170161144
- Publication date Jun 8, 2017
- NVIDIA Corporation
- David Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR SCRUBBING AND CORRECTING DRAM MEMORY DATA WITH INTERNAL...
- Publication number 20170161142
- Publication date Jun 8, 2017
- NVIDIA Corporation
- David Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MANAGEMENT SYSTEMS AND METHODS
- Publication number 20170153945
- Publication date Jun 1, 2017
- NVIDIA Corporation
- Bruce Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MANAGEMENT SYSTEMS AND METHODS
- Publication number 20170060429
- Publication date Mar 2, 2017
- NVIDIA Corporation
- Alok Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20160125930
- Publication date May 5, 2016
- RAMBUS INC.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20150255144
- Publication date Sep 10, 2015
- RAMBUS INC.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20150248926
- Publication date Sep 3, 2015
- RAMBUS INC.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20150243343
- Publication date Aug 27, 2015
- RAMBUS INC.
- Thomas J. Giovannini
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FORMED WITH A SEMICONDUCTOR INTERPOSER
- Publication number 20150046612
- Publication date Feb 12, 2015
- NVIDIA Corporation
- Alok Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS BIT REMAPPING SCHEME TO REDUCE ACCESS GRANULARITY OF DRAM A...
- Publication number 20140160876
- Publication date Jun 12, 2014
- NVIDIA Corporation
- Alok GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
TIME-MULTIPLEXED COMMUNICATION PROTOCOL FOR TRANSMITTING A COMMAND...
- Publication number 20130297864
- Publication date Nov 7, 2013
- Alok Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
TIME-MULTIPLEXED COMMUNICATION PROTOCOL FOR TRANSMITTING A COMMAND...
- Publication number 20130297865
- Publication date Nov 7, 2013
- Alok Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR CALIBRATION OF SERIAL LINKS USING A SERIAL-TO...
- Publication number 20130151796
- Publication date Jun 13, 2013
- NVIDIA Corporation
- Alok Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT COMMAND MAPPING SCHEME FOR SHORT DATA BURST LENGTH MEMORY...
- Publication number 20130103917
- Publication date Apr 25, 2013
- NVIDIA Corporation
- Alok Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER AND A DYNAMIC RANDOM ACCESS MEMORY INTERFACE
- Publication number 20130054884
- Publication date Feb 28, 2013
- Alok GUPTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20110216611
- Publication date Sep 8, 2011
- RAMBUS INC.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20090161453
- Publication date Jun 25, 2009
- RAMBUS INC.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Method and apparatus for calibrating write timing in a memory system

Method and apparatus for calibrating write timing in a memory system

Method and apparatus for calibrating write timing in a memory system

Memory management systems and methods

Memory management systems and methods using a management communicat...

Method and apparatus for calibrating write timing in a memory system

Memory management systems and methods

Controller-based memory scrub for DRAMs with internal error-correct...

Method and apparatus for calibrating write timing in a memory system

Controller-based memory scrub for DRAMs with internal error-correct...

Address bit remapping scheme to reduce access granularity of DRAM a...

Method and apparatus for calibrating write timing in a memory system

Method for scrubbing and correcting DRAM memory data with internal...

Time-multiplexed communication protocol for transmitting a command...

Method for memory scrub of DRAM with internal error correcting code...

Time-multiplexed communication protocol for transmitting a command...

Method and apparatus for calibrating write timing in a memory system

Memory device formed with a semiconductor interposer

System and method for calibration of serial links using a serial-to...

Efficient command mapping scheme for short data burst length memory...

Method and apparatus for calibrating write timing in a memory system

Method and apparatus for calibrating write timing in a memory system

Method and apparatus for calibrating write timing in a memory system

Method and apparatus for calibrating write timing in a memory system

Memory controller and a dynamic random access memory interface

Method and apparatus for calibrating write timing in a memory system

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

MEMORY MANAGEMENT SYSTEMS AND METHODS

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

Classification for Asymmetric Error Costs

CONTROLLER-BASED MEMORY SCRUB FOR DRAMS WITH INTERNAL ERROR-CORRECT...

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

CONTROLLER-BASED MEMORY SCRUB FOR DRAMS WITH INTERNAL ERROR-CORRECT...

METHOD FOR MEMORY SCRUB OF DRAM WITH INTERNAL ERROR CORRECTING CODE...

METHOD FOR SCRUBBING AND CORRECTING DRAM MEMORY DATA WITH INTERNAL...

MEMORY MANAGEMENT SYSTEMS AND METHODS

MEMORY MANAGEMENT SYSTEMS AND METHODS

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

MEMORY DEVICE FORMED WITH A SEMICONDUCTOR INTERPOSER

ADDRESS BIT REMAPPING SCHEME TO REDUCE ACCESS GRANULARITY OF DRAM A...

TIME-MULTIPLEXED COMMUNICATION PROTOCOL FOR TRANSMITTING A COMMAND...

TIME-MULTIPLEXED COMMUNICATION PROTOCOL FOR TRANSMITTING A COMMAND...

SYSTEM AND METHOD FOR CALIBRATION OF SERIAL LINKS USING A SERIAL-TO...

EFFICIENT COMMAND MAPPING SCHEME FOR SHORT DATA BURST LENGTH MEMORY...

MEMORY CONTROLLER AND A DYNAMIC RANDOM ACCESS MEMORY INTERFACE

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM