Alon Naveh

Person

Ramat Hasharon, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Method for booting a heterogeneous system and presenting a symmetri...
- Patent number 10,503,517
- Issue date Dec 10, 2019
- Intel Corporation
- Eliezer Weissmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing an interface for demotion control information in a processor
- Patent number 10,379,596
- Issue date Aug 13, 2019
- Intel Corporation
- Eliezer Weissmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
User level control of power management policies
- Patent number 10,372,197
- Issue date Aug 6, 2019
- Intel Corporation
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for saving and retrieving micro-architecture context
- Patent number 10,191,742
- Issue date Jan 29, 2019
- Intel Corporation
- Efraim Rotem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Migrating tasks between asymmetric computing elements of a multi-co...
- Patent number 10,185,566
- Issue date Jan 22, 2019
- Intel Corporation
- Alon Naveh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically controlling cache size to maximize energy efficiency
- Patent number 10,067,553
- Issue date Sep 4, 2018
- Intel Corporation
- Avinash N. Ananthakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operating point management in multi-core architectures
- Patent number 10,013,047
- Issue date Jul 3, 2018
- Intel Corporation
- Efraim Rotem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for a zero voltage processor sleep state
- Patent number 9,874,925
- Issue date Jan 23, 2018
- Intel Corporation
- Sanjeev Jahagirdar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for a zero voltage processor sleep state
- Patent number 9,870,044
- Issue date Jan 16, 2018
- Intel Corporation
- Sanjeev Jahagirdar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for a zero voltage processor sleep state
- Patent number 9,841,807
- Issue date Dec 12, 2017
- Intel Corporation
- Sanjeev Jahagirdar
- G11 - INFORMATION STORAGE
Information Patent Grant
Operating point management in multi-core architectures
- Patent number 9,785,226
- Issue date Oct 10, 2017
- Intel Corporation
- Efraim Rotem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for booting a heterogeneous system and presenting a symmetri...
- Patent number 9,727,345
- Issue date Aug 8, 2017
- Intel Corporation
- Eliezer Weissmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing an asymmetric multicore processor system transparently to...
- Patent number 9,720,730
- Issue date Aug 1, 2017
- Intel Corporation
- Boris Ginzburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for heterogeneous processors mapping to virtua...
- Patent number 9,639,372
- Issue date May 2, 2017
- Intel Corporation
- Paolo Narvaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operating point management in multi-core architectures
- Patent number 9,619,009
- Issue date Apr 11, 2017
- Intel Corporation
- Efraim Rotem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
User level control of power management policies
- Patent number 9,535,487
- Issue date Jan 3, 2017
- Intel Corporation
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect to communicate information uni-directionally
- Patent number 9,477,627
- Issue date Oct 25, 2016
- Intel Corporation
- Shaun M. Conrad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically controlling cache size to maximize energy efficiency
- Patent number 9,471,490
- Issue date Oct 18, 2016
- Intel Corporation
- Avinash N. Ananthakrishnan
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method, apparatus, and system for energy efficiency and energy cons...
- Patent number 9,400,545
- Issue date Jul 26, 2016
- Intel Corporation
- Inder M. Sodhi
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Extension of CPU context-state management for micro-architecture state
- Patent number 9,361,101
- Issue date Jun 7, 2016
- Intel Corporation
- Efraim Rotem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Core switching acceleration in asymmetric multiprocessor system
- Patent number 9,348,594
- Issue date May 24, 2016
- Intel Corporation
- Koichi Yamada
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Hetergeneous processor apparatus and method
- Patent number 9,329,900
- Issue date May 3, 2016
- Intel Corporation
- Paolo Narvaez
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Techniques and system for managing platform temperature
- Patent number 9,268,378
- Issue date Feb 23, 2016
- Intel Corporation
- Efraim Rotem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for monitor and MWAIT in a distributed cache a...
- Patent number 9,239,789
- Issue date Jan 19, 2016
- Intel Corporation
- Zeev Offen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for a zero voltage processor
- Patent number 9,235,258
- Issue date Jan 12, 2016
- Intel Corporation
- Sanjeev Jahagirdar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for a zero voltage processor
- Patent number 9,223,389
- Issue date Dec 29, 2015
- Intel Corporation
- Sanjeev Jahagirdar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for a zero voltage processor
- Patent number 9,223,390
- Issue date Dec 29, 2015
- Intel Corporation
- Sanjeev Jahagirdar
- G11 - INFORMATION STORAGE
Information Patent Grant
User level control of power management policies
- Patent number 9,170,624
- Issue date Oct 27, 2015
- Intel Corporation
- Krishnakanth V. Sistla
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Dynamically controlling cache size to maximize energy efficiency
- Patent number 9,158,693
- Issue date Oct 13, 2015
- Intel Corporation
- Avinash N. Ananthakrishnan
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Mechanism for facilitating faster suspend/resume operations in comp...
- Patent number 9,152,205
- Issue date Oct 6, 2015
- Intel Corporation
- Ohad Falik
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR BOOTING A HETEROGENEOUS SYSTEM AND PRESENTING A SYMMETRI...
- Publication number 20180060078
- Publication date Mar 1, 2018
- Intel Corporation
- Eliezer Weissmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Providing An Interface For Demotion Control Information In A Processor
- Publication number 20180039322
- Publication date Feb 8, 2018
- Eliezer Weissmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For A Zero Voltage Processor Sleep State
- Publication number 20170269672
- Publication date Sep 21, 2017
- Intel Corporation
- Sanjeev Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
User Level Control Of Power Management Policies
- Publication number 20170083076
- Publication date Mar 23, 2017
- Intel Corporation
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For A Zero Voltage Processor Sleep State
- Publication number 20170017297
- Publication date Jan 19, 2017
- Intel Corporation
- Sanjeev Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically Controlling Cache Size To Maximize Energy Efficiency
- Publication number 20170010656
- Publication date Jan 12, 2017
- Intel Corporation
- Avinash N. Ananthakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATING POINT MANAGEMENT IN MULTI-CORE ARCHITECTURES
- Publication number 20160246359
- Publication date Aug 25, 2016
- EFRAIM ROTEM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For A Zero Voltage Processor Sleep State
- Publication number 20160098075
- Publication date Apr 7, 2016
- Sanjeev Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR A ZERO VOLTAGE PROCESSOR SLEEP STATE
- Publication number 20160091958
- Publication date Mar 31, 2016
- Intel Corporation
- Sanjeev Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATING POINT MANAGEMENT IN MULTl-CORE ARCHITECTURES
- Publication number 20160018882
- Publication date Jan 21, 2016
- EFRAIM ROTEM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically Controlling Cache Size To Maximize Energy Efficiency
- Publication number 20160011975
- Publication date Jan 14, 2016
- Intel Corporation
- Avinash N. Ananthakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
User Level Control Of Power Management Policies
- Publication number 20160004291
- Publication date Jan 7, 2016
- Intel Corporation
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MONITOR AND MWAIT IN A DISTRIBUTED CACHE A...
- Publication number 20150286568
- Publication date Oct 8, 2015
- Intel Corporation
- Zeev Offen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For A Zero Voltage Processor Sleep State
- Publication number 20150169043
- Publication date Jun 18, 2015
- Intel Corporation
- Sanjeev Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For A Zero Voltage Processor
- Publication number 20150058667
- Publication date Feb 26, 2015
- Intel Corporation
- Sanjeev Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For A Zero Voltage Processor
- Publication number 20150052377
- Publication date Feb 19, 2015
- Intel Corporation
- Sanjeev Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES AND SYSTEM FOR MANAGING PLATFORM TEMPERATURE
- Publication number 20150006937
- Publication date Jan 1, 2015
- EFRAIM ROTEM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For A Zero Voltage Processor
- Publication number 20150006938
- Publication date Jan 1, 2015
- Sanjeev Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR SAVING AND RETRIEVING MICRO-ARCHITECTURE CONTEXT
- Publication number 20140325184
- Publication date Oct 30, 2014
- Efraim Rotem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONS...
- Publication number 20140317430
- Publication date Oct 23, 2014
- Alon Naveh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING POWER SUPPLY UNIT POWER CONSUMPTION DURING IDLE STATE
- Publication number 20140281634
- Publication date Sep 18, 2014
- EFRAIM ROTEM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HETERGENEOUS PROCESSOR APPARATUS AND METHOD
- Publication number 20140189299
- Publication date Jul 3, 2014
- Paolo Narvaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HETERGENEOUS PROCESSOR APPARATUS AND METHOD
- Publication number 20140189704
- Publication date Jul 3, 2014
- Paolo Narvaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMAL LOGICAL PROCESSOR COUNT AND TYPE SELECTION FOR A GIVEN WORK...
- Publication number 20140189302
- Publication date Jul 3, 2014
- Dheeraj R. Subbareddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HETERGENEOUS PROCESSOR APPARATUS AND METHOD
- Publication number 20140189297
- Publication date Jul 3, 2014
- Paolo Narvaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD MIGRATION SUPPORT FOR ARCHITECTUALLY DIFFERENT CORES
- Publication number 20140181830
- Publication date Jun 26, 2014
- Mishali Naik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT TO COMMUNICATE INFORMATION UNI-DIRECTIONALLY
- Publication number 20140181352
- Publication date Jun 26, 2014
- Shaun M. Conrad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MIGRATING TASKS BETWEEN ASYMMETRIC COMPUTING ELEMENTS OF A MULTI-CO...
- Publication number 20140129808
- Publication date May 8, 2014
- Alon Naveh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATING POINT MANAGEMENT IN MULTI-CORE ARCHITECTURES
- Publication number 20140115362
- Publication date Apr 24, 2014
- Efraim Rotem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING AN ASYMMETRIC MULTICORE PROCESSOR SYSTEM TRANSPARENTLY TO...
- Publication number 20140082630
- Publication date Mar 20, 2014
- Boris Ginzburg
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Method for booting a heterogeneous system and presenting a symmetri...

Providing an interface for demotion control information in a processor

User level control of power management policies

Mechanism for saving and retrieving micro-architecture context

Migrating tasks between asymmetric computing elements of a multi-co...

Dynamically controlling cache size to maximize energy efficiency

Operating point management in multi-core architectures

Method and apparatus for a zero voltage processor sleep state

Method and apparatus for a zero voltage processor sleep state

Method and apparatus for a zero voltage processor sleep state

Operating point management in multi-core architectures

Method for booting a heterogeneous system and presenting a symmetri...

Providing an asymmetric multicore processor system transparently to...

Apparatus and method for heterogeneous processors mapping to virtua...

Operating point management in multi-core architectures

User level control of power management policies

Interconnect to communicate information uni-directionally

Dynamically controlling cache size to maximize energy efficiency

Method, apparatus, and system for energy efficiency and energy cons...

Extension of CPU context-state management for micro-architecture state

Core switching acceleration in asymmetric multiprocessor system

Hetergeneous processor apparatus and method

Techniques and system for managing platform temperature

Method and apparatus for monitor and MWAIT in a distributed cache a...

Method and apparatus for a zero voltage processor

Method and apparatus for a zero voltage processor

Method and apparatus for a zero voltage processor

User level control of power management policies

Dynamically controlling cache size to maximize energy efficiency

Mechanism for facilitating faster suspend/resume operations in comp...

Patents Applicationslast 30 patents

METHOD FOR BOOTING A HETEROGENEOUS SYSTEM AND PRESENTING A SYMMETRI...

Providing An Interface For Demotion Control Information In A Processor

Method And Apparatus For A Zero Voltage Processor Sleep State

User Level Control Of Power Management Policies

Method And Apparatus For A Zero Voltage Processor Sleep State

Dynamically Controlling Cache Size To Maximize Energy Efficiency

OPERATING POINT MANAGEMENT IN MULTI-CORE ARCHITECTURES

Method And Apparatus For A Zero Voltage Processor Sleep State

METHOD AND APPARATUS FOR A ZERO VOLTAGE PROCESSOR SLEEP STATE

OPERATING POINT MANAGEMENT IN MULTl-CORE ARCHITECTURES

Dynamically Controlling Cache Size To Maximize Energy Efficiency

User Level Control Of Power Management Policies

METHOD AND APPARATUS FOR MONITOR AND MWAIT IN A DISTRIBUTED CACHE A...

Method And Apparatus For A Zero Voltage Processor Sleep State

Method And Apparatus For A Zero Voltage Processor

Method And Apparatus For A Zero Voltage Processor

TECHNIQUES AND SYSTEM FOR MANAGING PLATFORM TEMPERATURE

Method And Apparatus For A Zero Voltage Processor

MECHANISM FOR SAVING AND RETRIEVING MICRO-ARCHITECTURE CONTEXT

METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONS...

CONTROLLING POWER SUPPLY UNIT POWER CONSUMPTION DURING IDLE STATE

HETERGENEOUS PROCESSOR APPARATUS AND METHOD

HETERGENEOUS PROCESSOR APPARATUS AND METHOD

OPTIMAL LOGICAL PROCESSOR COUNT AND TYPE SELECTION FOR A GIVEN WORK...

HETERGENEOUS PROCESSOR APPARATUS AND METHOD

THREAD MIGRATION SUPPORT FOR ARCHITECTUALLY DIFFERENT CORES

INTERCONNECT TO COMMUNICATE INFORMATION UNI-DIRECTIONALLY

MIGRATING TASKS BETWEEN ASYMMETRIC COMPUTING ELEMENTS OF A MULTI-CO...

OPERATING POINT MANAGEMENT IN MULTI-CORE ARCHITECTURES

PROVIDING AN ASYMMETRIC MULTICORE PROCESSOR SYSTEM TRANSPARENTLY TO...