Altug Koker

Person

El Dorado Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for managing data bias in a graphics processin...
- Patent number 12,260,470
- Issue date Mar 25, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On chip dense memory for temporal buffering
- Patent number 12,254,526
- Issue date Mar 18, 2025
- Intel Corporation
- Varghese George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data initialization techniques
- Patent number 12,242,414
- Issue date Mar 4, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generation and storage of compressed Z-planes in graphics processing
- Patent number 12,236,498
- Issue date Feb 25, 2025
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for synchronization of multi-thread lanes
- Patent number 12,223,353
- Issue date Feb 11, 2025
- Intel Corporation
- Valentin Andrei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to perform floating point and integer operat...
- Patent number 12,217,053
- Issue date Feb 4, 2025
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient thread group scheduling
- Patent number 12,210,900
- Issue date Jan 28, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor data access and sharing
- Patent number 12,204,487
- Issue date Jan 21, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic allocation of cache based on instantaneous bandwidth consum...
- Patent number 12,198,220
- Issue date Jan 14, 2025
- Intel Corporation
- Kiran C. Veernapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 12,198,221
- Issue date Jan 14, 2025
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data locality enhancement for graphics processing units
- Patent number 12,190,118
- Issue date Jan 7, 2025
- Intel Corporation
- Christopher J. Hughes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,182,062
- Issue date Dec 31, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for cache optimization
- Patent number 12,182,035
- Issue date Dec 31, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,153,541
- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for error detection and control for embedded me...
- Patent number 12,147,302
- Issue date Nov 19, 2024
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimizations for low precision machine learning operations
- Patent number 12,148,063
- Issue date Nov 19, 2024
- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for shared virtual memory to manage data coher...
- Patent number 12,147,346
- Issue date Nov 19, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to perform floating point and integer operat...
- Patent number 12,141,578
- Issue date Nov 12, 2024
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling product SKUs based on chiplet configurations
- Patent number 12,141,890
- Issue date Nov 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page faulting and selective preemption
- Patent number 12,131,402
- Issue date Oct 29, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor power management
- Patent number 12,124,310
- Issue date Oct 22, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for cache optimization
- Patent number 12,124,383
- Issue date Oct 22, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Smart compression/decompression schemes for efficiency and superior...
- Patent number 12,118,756
- Issue date Oct 15, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 12,117,962
- Issue date Oct 15, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable coarse grained and sparse matrix compute hardware with...
- Patent number 12,112,397
- Issue date Oct 8, 2024
- Intel Corporation
- Eriko Nurvitadhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of system-on-chip (SOC) architecture
- Patent number 12,112,398
- Issue date Oct 8, 2024
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,099,461
- Issue date Sep 24, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression techniques
- Patent number 12,093,210
- Issue date Sep 17, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DATA LOCALITY ENHANCEMENT FOR GRAPHICS PROCESSING UNITS
- Publication number 20250103343
- Publication date Mar 27, 2025
- Intel Corporation
- Christopher J. HUGHES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS
- Publication number 20250104179
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
- Publication number 20250103548
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20250103546
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR ERROR DETECTION AND CONTROL FOR EMBEDDED ME...
- Publication number 20250103430
- Publication date Mar 27, 2025
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR CACHE OPTIMIZATION
- Publication number 20250103511
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE
- Publication number 20250103547
- Publication date Mar 27, 2025
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...
- Publication number 20250094170
- Publication date Mar 20, 2025
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PAGE FAULTING AND SELECTIVE PREEMPTION
- Publication number 20250095099
- Publication date Mar 20, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALAR CORE INTEGRATION
- Publication number 20250068588
- Publication date Feb 27, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE COARSE GRAINED AND SPARSE MATRIX COMPUTE HARDWARE WITH...
- Publication number 20250061534
- Publication date Feb 20, 2025
- Intel Corporation
- Eriko Nurvitadhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20250061535
- Publication date Feb 20, 2025
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SHARED VIRTUAL MEMORY TO MANAGE DATA COHER...
- Publication number 20250061060
- Publication date Feb 20, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING PIPELINE SUBMISSIONS ACROSS MANY COMPUTE UNITS
- Publication number 20250054096
- Publication date Feb 13, 2025
- Intel Corporation
- BALAJI VEMBU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEDULING OF THREADS FOR EXECUTION UTILIZING LOAD BALANCING OF THR...
- Publication number 20250036451
- Publication date Jan 30, 2025
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
- Publication number 20250028675
- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM
- Publication number 20250005703
- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
- Publication number 20250004981
- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE SOFTWARE COMMUNICATION CHANNEL TO SUPPORT DIRECT PROGRAMMI...
- Publication number 20240427679
- Publication date Dec 26, 2024
- Intel Corporation
- Renu Patle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20240411717
- Publication date Dec 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION TECHNIQUES
- Publication number 20240403259
- Publication date Dec 5, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS WITH ADAPTIVE TEMPORAL ADJUSTMENTS
- Publication number 20240404487
- Publication date Dec 5, 2024
- Intel Corporation
- Louis Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT DATA SHARING FOR GRAPHICS DATA PROCESSING OPERATIONS
- Publication number 20240385975
- Publication date Nov 21, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD SCHEDULING OVER COMPUTE BLOCKS FOR POWER OPTIMIZATION
- Publication number 20240362741
- Publication date Oct 31, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Regional Adjustment of Render Rate
- Publication number 20240354043
- Publication date Oct 24, 2024
- Intel Corporation
- Eric J. Asperheim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT FABRIC LINK WIDTH REDUCTION TO REDUCE INSTANTANEOUS PO...
- Publication number 20240353912
- Publication date Oct 24, 2024
- Intel Corporation
- Mohammed Tameem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BARRIERS AND SYNCHRONIZATION FOR MACHINE LEARNING AT AUTONOMOUS MAC...
- Publication number 20240280987
- Publication date Aug 22, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD STORE CACHE MICROARCHITECTURE
- Publication number 20240281249
- Publication date Aug 22, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING

Altug Koker

Person

Patents Grantslast 30 patents

Apparatus and method for managing data bias in a graphics processin...

On chip dense memory for temporal buffering

Data initialization techniques

Generation and storage of compressed Z-planes in graphics processing

Systems and methods for synchronization of multi-thread lanes

Instructions and logic to perform floating point and integer operat...

Systems and methods for improving cache efficiency and utilization

Efficient thread group scheduling

Graphics processor data access and sharing

Dynamic allocation of cache based on instantaneous bandwidth consum...

Compute optimization mechanism for deep neural networks

Data locality enhancement for graphics processing units

Multi-tile memory management

Systems and methods for cache optimization

Cache structure and utilization

Systems and methods for error detection and control for embedded me...

Compute optimizations for low precision machine learning operations

Method and apparatus for shared virtual memory to manage data coher...

Instructions and logic to perform floating point and integer operat...

Systolic disaggregation within a matrix accelerator architecture

Enabling product SKUs based on chiplet configurations

Page faulting and selective preemption

Processor power management

Systems and methods for cache optimization

Smart compression/decompression schemes for efficiency and superior...

Scalar core integration

Programmable coarse grained and sparse matrix compute hardware with...

Disaggregation of system-on-chip (SOC) architecture

Multi-tile memory management

Compression techniques

Patents Applicationslast 30 patents

DATA LOCALITY ENHANCEMENT FOR GRAPHICS PROCESSING UNITS

ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

CACHE STRUCTURE AND UTILIZATION

SYSTEMS AND METHODS FOR ERROR DETECTION AND CONTROL FOR EMBEDDED ME...

SYSTEMS AND METHODS FOR CACHE OPTIMIZATION

SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE

INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...

PAGE FAULTING AND SELECTIVE PREEMPTION

SCALAR CORE INTEGRATION

PROGRAMMABLE COARSE GRAINED AND SPARSE MATRIX COMPUTE HARDWARE WITH...

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

METHOD AND APPARATUS FOR SHARED VIRTUAL MEMORY TO MANAGE DATA COHER...

HANDLING PIPELINE SUBMISSIONS ACROSS MANY COMPUTE UNITS

SCHEDULING OF THREADS FOR EXECUTION UTILIZING LOAD BALANCING OF THR...

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

COMPUTE OPTIMIZATION MECHANISM

MULTI-TILE MEMORY MANAGEMENT

HARDWARE SOFTWARE COMMUNICATION CHANNEL TO SUPPORT DIRECT PROGRAMMI...

CACHE STRUCTURE AND UTILIZATION

COMPRESSION TECHNIQUES

GRAPHICS WITH ADAPTIVE TEMPORAL ADJUSTMENTS

EFFICIENT DATA SHARING FOR GRAPHICS DATA PROCESSING OPERATIONS

THREAD SCHEDULING OVER COMPUTE BLOCKS FOR POWER OPTIMIZATION

Regional Adjustment of Render Rate

INTERCONNECT FABRIC LINK WIDTH REDUCTION TO REDUCE INSTANTANEOUS PO...

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

BARRIERS AND SYNCHRONIZATION FOR MACHINE LEARNING AT AUTONOMOUS MAC...

LOAD STORE CACHE MICROARCHITECTURE