Altug Koker

Person

El Dorado Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Data initialization techniques
- Patent number 12,242,414
- Issue date Mar 4, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generation and storage of compressed Z-planes in graphics processing
- Patent number 12,236,498
- Issue date Feb 25, 2025
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for synchronization of multi-thread lanes
- Patent number 12,223,353
- Issue date Feb 11, 2025
- Intel Corporation
- Valentin Andrei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to perform floating point and integer operat...
- Patent number 12,217,053
- Issue date Feb 4, 2025
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient thread group scheduling
- Patent number 12,210,900
- Issue date Jan 28, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor data access and sharing
- Patent number 12,204,487
- Issue date Jan 21, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic allocation of cache based on instantaneous bandwidth consum...
- Patent number 12,198,220
- Issue date Jan 14, 2025
- Intel Corporation
- Kiran C. Veernapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 12,198,221
- Issue date Jan 14, 2025
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data locality enhancement for graphics processing units
- Patent number 12,190,118
- Issue date Jan 7, 2025
- Intel Corporation
- Christopher J. Hughes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,182,062
- Issue date Dec 31, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for cache optimization
- Patent number 12,182,035
- Issue date Dec 31, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,153,541
- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for error detection and control for embedded me...
- Patent number 12,147,302
- Issue date Nov 19, 2024
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimizations for low precision machine learning operations
- Patent number 12,148,063
- Issue date Nov 19, 2024
- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for shared virtual memory to manage data coher...
- Patent number 12,147,346
- Issue date Nov 19, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to perform floating point and integer operat...
- Patent number 12,141,578
- Issue date Nov 12, 2024
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling product SKUs based on chiplet configurations
- Patent number 12,141,890
- Issue date Nov 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page faulting and selective preemption
- Patent number 12,131,402
- Issue date Oct 29, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor power management
- Patent number 12,124,310
- Issue date Oct 22, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for cache optimization
- Patent number 12,124,383
- Issue date Oct 22, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Smart compression/decompression schemes for efficiency and superior...
- Patent number 12,118,756
- Issue date Oct 15, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 12,117,962
- Issue date Oct 15, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable coarse grained and sparse matrix compute hardware with...
- Patent number 12,112,397
- Issue date Oct 8, 2024
- Intel Corporation
- Eriko Nurvitadhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of system-on-chip (SOC) architecture
- Patent number 12,112,398
- Issue date Oct 8, 2024
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,099,461
- Issue date Sep 24, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression techniques
- Patent number 12,093,210
- Issue date Sep 17, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheduling of threads for execution utilizing load balancing of thr...
- Patent number 12,086,602
- Issue date Sep 10, 2024
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor operation scheduling for deterministic latency
- Patent number 12,079,155
- Issue date Sep 3, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SCALAR CORE INTEGRATION
- Publication number 20250068588
- Publication date Feb 27, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE COARSE GRAINED AND SPARSE MATRIX COMPUTE HARDWARE WITH...
- Publication number 20250061534
- Publication date Feb 20, 2025
- Intel Corporation
- Eriko Nurvitadhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20250061535
- Publication date Feb 20, 2025
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SHARED VIRTUAL MEMORY TO MANAGE DATA COHER...
- Publication number 20250061060
- Publication date Feb 20, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING PIPELINE SUBMISSIONS ACROSS MANY COMPUTE UNITS
- Publication number 20250054096
- Publication date Feb 13, 2025
- Intel Corporation
- BALAJI VEMBU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEDULING OF THREADS FOR EXECUTION UTILIZING LOAD BALANCING OF THR...
- Publication number 20250036451
- Publication date Jan 30, 2025
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
- Publication number 20250028675
- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM
- Publication number 20250005703
- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
- Publication number 20250004981
- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE SOFTWARE COMMUNICATION CHANNEL TO SUPPORT DIRECT PROGRAMMI...
- Publication number 20240427679
- Publication date Dec 26, 2024
- Intel Corporation
- Renu Patle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20240411717
- Publication date Dec 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION TECHNIQUES
- Publication number 20240403259
- Publication date Dec 5, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS WITH ADAPTIVE TEMPORAL ADJUSTMENTS
- Publication number 20240404487
- Publication date Dec 5, 2024
- Intel Corporation
- Louis Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT DATA SHARING FOR GRAPHICS DATA PROCESSING OPERATIONS
- Publication number 20240385975
- Publication date Nov 21, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD SCHEDULING OVER COMPUTE BLOCKS FOR POWER OPTIMIZATION
- Publication number 20240362741
- Publication date Oct 31, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Regional Adjustment of Render Rate
- Publication number 20240354043
- Publication date Oct 24, 2024
- Intel Corporation
- Eric J. Asperheim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT FABRIC LINK WIDTH REDUCTION TO REDUCE INSTANTANEOUS PO...
- Publication number 20240353912
- Publication date Oct 24, 2024
- Intel Corporation
- Mohammed Tameem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BARRIERS AND SYNCHRONIZATION FOR MACHINE LEARNING AT AUTONOMOUS MAC...
- Publication number 20240280987
- Publication date Aug 22, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD STORE CACHE MICROARCHITECTURE
- Publication number 20240281249
- Publication date Aug 22, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Increasing Performance In A Proces...
- Publication number 20240264657
- Publication date Aug 8, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20240256483
- Publication date Aug 1, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS
- Publication number 20240257294
- Publication date Aug 1, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PREFETCHING FOR GRAPHICS DATA PROCESSING
- Publication number 20240256456
- Publication date Aug 1, 2024
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONVOLUTIONAL NEURAL NETWORK OPTIMIZATION MECHANISM
- Publication number 20240256825
- Publication date Aug 1, 2024
- Intel Corporation
- Liwei Ma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECTOR CACHE FOR COMPRESSION
- Publication number 20240232094
- Publication date Jul 11, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD STORE MICROARCHITECTURE CACHE ENHANCEMENTS
- Publication number 20240211403
- Publication date Jun 27, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MEMORY RECONFIGURATION
- Publication number 20240184739
- Publication date Jun 6, 2024
- Intel Corporation
- Joydeep RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...
- Publication number 20240184572
- Publication date Jun 6, 2024
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING

Altug Koker

Person

Patents Grantslast 30 patents

Data initialization techniques

Generation and storage of compressed Z-planes in graphics processing

Systems and methods for synchronization of multi-thread lanes

Instructions and logic to perform floating point and integer operat...

Systems and methods for improving cache efficiency and utilization

Efficient thread group scheduling

Graphics processor data access and sharing

Dynamic allocation of cache based on instantaneous bandwidth consum...

Compute optimization mechanism for deep neural networks

Data locality enhancement for graphics processing units

Multi-tile memory management

Systems and methods for cache optimization

Cache structure and utilization

Systems and methods for error detection and control for embedded me...

Compute optimizations for low precision machine learning operations

Method and apparatus for shared virtual memory to manage data coher...

Instructions and logic to perform floating point and integer operat...

Systolic disaggregation within a matrix accelerator architecture

Enabling product SKUs based on chiplet configurations

Page faulting and selective preemption

Processor power management

Systems and methods for cache optimization

Smart compression/decompression schemes for efficiency and superior...

Scalar core integration

Programmable coarse grained and sparse matrix compute hardware with...

Disaggregation of system-on-chip (SOC) architecture

Multi-tile memory management

Compression techniques

Scheduling of threads for execution utilizing load balancing of thr...

Graphics processor operation scheduling for deterministic latency

Patents Applicationslast 30 patents

SCALAR CORE INTEGRATION

PROGRAMMABLE COARSE GRAINED AND SPARSE MATRIX COMPUTE HARDWARE WITH...

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

METHOD AND APPARATUS FOR SHARED VIRTUAL MEMORY TO MANAGE DATA COHER...

HANDLING PIPELINE SUBMISSIONS ACROSS MANY COMPUTE UNITS

SCHEDULING OF THREADS FOR EXECUTION UTILIZING LOAD BALANCING OF THR...

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

COMPUTE OPTIMIZATION MECHANISM

MULTI-TILE MEMORY MANAGEMENT

HARDWARE SOFTWARE COMMUNICATION CHANNEL TO SUPPORT DIRECT PROGRAMMI...

CACHE STRUCTURE AND UTILIZATION

COMPRESSION TECHNIQUES

GRAPHICS WITH ADAPTIVE TEMPORAL ADJUSTMENTS

EFFICIENT DATA SHARING FOR GRAPHICS DATA PROCESSING OPERATIONS

THREAD SCHEDULING OVER COMPUTE BLOCKS FOR POWER OPTIMIZATION

Regional Adjustment of Render Rate

INTERCONNECT FABRIC LINK WIDTH REDUCTION TO REDUCE INSTANTANEOUS PO...

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

BARRIERS AND SYNCHRONIZATION FOR MACHINE LEARNING AT AUTONOMOUS MAC...

LOAD STORE CACHE MICROARCHITECTURE

System, Apparatus And Method For Increasing Performance In A Proces...

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

CONVOLUTIONAL NEURAL NETWORK OPTIMIZATION MECHANISM

SECTOR CACHE FOR COMPRESSION

LOAD STORE MICROARCHITECTURE CACHE ENHANCEMENTS

DYNAMIC MEMORY RECONFIGURATION

INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...