Alvan W. Ng

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Signal pre-routing in an integrated circuit design
- Patent number 12,050,852
- Issue date Jul 30, 2024
- International Business Machines Corporation
- Wolfgang Roesner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pin cloning and subway creation on automatically generated design p...
- Patent number 10,599,804
- Issue date Mar 24, 2020
- International Business Machines Corporation
- Ali S. El-Zein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lateral castout (LCO) of victim cache line in data-invalid state
- Patent number 8,949,540
- Issue date Feb 3, 2015
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Soft hierarchy-based physical synthesis for large-scale, high-perfo...
- Patent number 8,516,412
- Issue date Aug 20, 2013
- International Business Machines Corporation
- Minsik Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling castout cache lines in a victim cache
- Patent number 8,499,124
- Issue date Jul 30, 2013
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for probabilistic interconnect planning
- Patent number 8,370,783
- Issue date Feb 5, 2013
- Kabushiki Kaisha Toshiba
- Taku Uchino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Empirically based dynamic control of acceptance of victim cache lat...
- Patent number 8,327,073
- Issue date Dec 4, 2012
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lateral cache-to-cache cast-in
- Patent number 8,225,045
- Issue date Jul 17, 2012
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure for a livelock resolution circuit
- Patent number 8,171,448
- Issue date May 1, 2012
- International Business Machines Corporation
- Charles R. Johns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure for dynamic livelock resolution with variable delay memor...
- Patent number 8,131,980
- Issue date Mar 6, 2012
- International Business Machines Corporation
- Ronald Hall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Livelock resolution
- Patent number 7,861,022
- Issue date Dec 28, 2010
- International Business Machines Corporation
- Charles R. Johns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for operating an age queue for memory request...
- Patent number 7,831,812
- Issue date Nov 9, 2010
- International Business Machines Corporation
- Alvan Wing Ng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for managing the power consumption of a data p...
- Patent number 7,721,123
- Issue date May 18, 2010
- International Business Machines Corporation
- Shigehiro Asano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay budget allocation with path trimming
- Patent number 7,681,158
- Issue date Mar 16, 2010
- Kabushiki Kaisha Toshiba
- Taku Uchino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for reducing store latency in symmetrical multipr...
- Patent number 7,519,780
- Issue date Apr 14, 2009
- International Business Machines Corporation
- Jonathan J. DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Livelock resolution method
- Patent number 7,500,035
- Issue date Mar 3, 2009
- International Business Machines Corporation
- Charles R. Johns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for managing the power consumption of a data p...
- Patent number 7,356,713
- Issue date Apr 8, 2008
- International Business Machines Corporation
- Shigehiro Asano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fixed snoop response time for source-clocked multiprocessor busses
- Patent number 7,171,445
- Issue date Jan 30, 2007
- International Business Machines Corporation
- James W. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of analyzing and filtering timing runs using common timing c...
- Patent number 6,779,162
- Issue date Aug 17, 2004
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-L2 processor subsystem architecture for networking system
- Patent number 6,751,704
- Issue date Jun 15, 2004
- International Business Machines Corporation
- Alvan Wing Ng
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SIGNAL PRE-ROUTING IN AN INTEGRATED CIRCUIT DESIGN
- Publication number 20230075565
- Publication date Mar 9, 2023
- International Business Machines Corporation
- Wolfgang Roesner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGICAL CLOCK CONNECTION IN AN INTEGRATED CIRCUIT DESIGN
- Publication number 20230070516
- Publication date Mar 9, 2023
- International Business Machines Corporation
- Ali S. El-Zein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFT HIERARCHY-BASED PHYSICAL SYNTHESIS FOR LARGE-SCALE, HIGH-PERFO...
- Publication number 20130055176
- Publication date Feb 28, 2013
- International Business Machines Corporation
- Minsik Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Empirically Based Dynamic Control of Acceptance of Victim Cache Lat...
- Publication number 20100262784
- Publication date Oct 14, 2010
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Handling Castout Cache Lines In A Victim Cache
- Publication number 20100235576
- Publication date Sep 16, 2010
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Lateral Castout (LCO) Of Victim Cache Line In Data-Invalid State
- Publication number 20100235584
- Publication date Sep 16, 2010
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache-To-Cache Cast-In
- Publication number 20100153647
- Publication date Jun 17, 2010
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Livelock Resolution
- Publication number 20090164682
- Publication date Jun 25, 2009
- International Business Machines Corporation
- Charles R. Johns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Probabilistic Interconnect Planning
- Publication number 20090144688
- Publication date Jun 4, 2009
- Taku Uchino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Evaluating the Timing Effects of Logic Blo...
- Publication number 20090064068
- Publication date Mar 5, 2009
- IBM Corporation
- Alvan Wing Ng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Operating an Age Queue for Memory Request...
- Publication number 20090063735
- Publication date Mar 5, 2009
- IBM Corporation
- Alvan Wing Ng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRUCTURE FOR DYNAMIC LIVELOCK RESOLUTION WITH VARIABLE DELAY MEMOR...
- Publication number 20080301374
- Publication date Dec 4, 2008
- INTERNATIONAL BUSINESS MACHINES CORPORATION
- RONALD HALL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Delay Budget Allocation with Path Trimming
- Publication number 20080250371
- Publication date Oct 9, 2008
- Taku Uchino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design Structure for a Livelock Resolution Circuit
- Publication number 20080228974
- Publication date Sep 18, 2008
- International Business Machines Corporation
- Charles R. Johns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MANAGING THE POWER CONSUMPTION OF A DATA P...
- Publication number 20080126817
- Publication date May 29, 2008
- Shigehiro Asano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Reducing Store Latency in Symmetrical Multipr...
- Publication number 20080109585
- Publication date May 8, 2008
- Jonathan J. DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Livelock Resolution Method and Apparatus
- Publication number 20080071955
- Publication date Mar 20, 2008
- Charles R. Johns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC LIVELOCK RESOLUTION WITH VARIABLE DELAY MEMORY ACCESS QUEUE
- Publication number 20080065873
- Publication date Mar 13, 2008
- Ronald Hall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for managing the power consumption of a data p...
- Publication number 20050028015
- Publication date Feb 3, 2005
- International Business Machines Corporation
- Shigehiro Asano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fixed snoop response time for source-clocked multiprocessor busses
- Publication number 20030131138
- Publication date Jul 10, 2003
- International Business Machines Corporation
- James W. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of analyzing and filtering timing runs
- Publication number 20030131328
- Publication date Jul 10, 2003
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic request pacing in switch systems
- Publication number 20030101297
- Publication date May 29, 2003
- International Business Machines Corporation
- James W. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dual-L2 processor subsystem architecture for networking system
- Publication number 20020073280
- Publication date Jun 13, 2002
- International Business Machines Corporation
- Alvan Wing Ng
- G06 - COMPUTING CALCULATING COUNTING

Alvan W. Ng

Person

Patents Grantslast 30 patents

Signal pre-routing in an integrated circuit design

Pin cloning and subway creation on automatically generated design p...

Lateral castout (LCO) of victim cache line in data-invalid state

Soft hierarchy-based physical synthesis for large-scale, high-perfo...

Handling castout cache lines in a victim cache

Systems and methods for probabilistic interconnect planning

Empirically based dynamic control of acceptance of victim cache lat...

Lateral cache-to-cache cast-in

Structure for a livelock resolution circuit

Structure for dynamic livelock resolution with variable delay memor...

Livelock resolution

Method and apparatus for operating an age queue for memory request...

Method and apparatus for managing the power consumption of a data p...

Delay budget allocation with path trimming

System and method for reducing store latency in symmetrical multipr...

Livelock resolution method

Method and apparatus for managing the power consumption of a data p...

Fixed snoop response time for source-clocked multiprocessor busses

Method of analyzing and filtering timing runs using common timing c...

Dual-L2 processor subsystem architecture for networking system

Patents Applicationslast 30 patents

SIGNAL PRE-ROUTING IN AN INTEGRATED CIRCUIT DESIGN

LOGICAL CLOCK CONNECTION IN AN INTEGRATED CIRCUIT DESIGN

SOFT HIERARCHY-BASED PHYSICAL SYNTHESIS FOR LARGE-SCALE, HIGH-PERFO...

Empirically Based Dynamic Control of Acceptance of Victim Cache Lat...

Handling Castout Cache Lines In A Victim Cache

Lateral Castout (LCO) Of Victim Cache Line In Data-Invalid State

Cache-To-Cache Cast-In

Livelock Resolution

Systems and Methods for Probabilistic Interconnect Planning

Method and Apparatus for Evaluating the Timing Effects of Logic Blo...

Method and Apparatus for Operating an Age Queue for Memory Request...

STRUCTURE FOR DYNAMIC LIVELOCK RESOLUTION WITH VARIABLE DELAY MEMOR...

Delay Budget Allocation with Path Trimming

Design Structure for a Livelock Resolution Circuit

METHOD AND APPARATUS FOR MANAGING THE POWER CONSUMPTION OF A DATA P...

System and Method for Reducing Store Latency in Symmetrical Multipr...

Livelock Resolution Method and Apparatus

DYNAMIC LIVELOCK RESOLUTION WITH VARIABLE DELAY MEMORY ACCESS QUEUE

Method and apparatus for managing the power consumption of a data p...

Fixed snoop response time for source-clocked multiprocessor busses

Method of analyzing and filtering timing runs

Dynamic request pacing in switch systems

Dual-L2 processor subsystem architecture for networking system