Ami Schwartzman

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Kfar-Sava, IL

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Patents Grantslast 30 patents

Information Patent Grant
Blocking latency events in multi-die architecture
- Patent number 12,332,723
- Issue date Jun 17, 2025
- Apple Inc.
- Inder M. Sodhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System-on-chip with DVFM protection circuit
- Patent number 12,228,989
- Issue date Feb 18, 2025
- Apple Inc.
- Doron Rajwan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing power state changes between multiple dies
- Patent number 11,899,523
- Issue date Feb 13, 2024
- Apple Inc.
- Inder M. Sodhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System-on-chip with DVFM protection circuit
- Patent number 11,836,026
- Issue date Dec 5, 2023
- Apple Inc.
- Doron Rajwan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-die power synchronization
- Patent number 11,467,655
- Issue date Oct 11, 2022
- Apple Inc.
- Inder M. Sodhi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
System-on-Chip with DVFM Protection Circuit
- Publication number 20240201766
- Publication date Jun 20, 2024
- Apple Inc.
- Doron Rajwan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Latency Events in Multi-Die Architecture
- Publication number 20240184355
- Publication date Jun 6, 2024
- Apple Inc.
- Inder M. Sodhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System-on-Chip with DVFM Protection Circuit
- Publication number 20230259189
- Publication date Aug 17, 2023
- Apple Inc.
- Doron Rajwan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Die Power Synchronization
- Publication number 20230059725
- Publication date Feb 23, 2023
- Apple Inc.
- Inder M. Sodhi
- G06 - COMPUTING CALCULATING COUNTING