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Amin Farshidi
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Austin, TX, US
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last 30 patents
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Patent Grant
Multi-dimension clock gate design in clock tree synthesis
Patent number
10,963,618
Issue date
Mar 30, 2021
Cadence Design Systems, Ine.
Amin Farshidi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Power aware resizing of clock tree instances
Patent number
10,796,066
Issue date
Oct 6, 2020
Cadence Design Systems, Inc.
Amin Farshidi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Systems and methods for clock tree generation with buffers and inve...
Patent number
10,354,040
Issue date
Jul 16, 2019
Cadence Design Systems, Inc.
Amin Farshidi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Clock cell library selection
Patent number
10,198,551
Issue date
Feb 5, 2019
Cadence Design Systems, Inc.
Amin Farshidi
G06 - COMPUTING CALCULATING COUNTING