Amir H. Mottaez

Person

Los Altos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Discretizing gate sizes during numerical synthesis
- Patent number 10,394,993
- Issue date Aug 27, 2019
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining optimal gate sizes by using a numerical solver
- Patent number 9,519,740
- Issue date Dec 13, 2016
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Solving an optimization problem using a constraints solver
- Patent number 9,454,626
- Issue date Sep 27, 2016
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Solving a gate-sizing optimization problem using a constraints solver
- Patent number 9,430,442
- Issue date Aug 30, 2016
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global timing modeling within a local context
- Patent number 9,384,309
- Issue date Jul 5, 2016
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Incremental slack margin propagation
- Patent number 9,280,625
- Issue date Mar 8, 2016
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient timing calculations in numerical sequential cell sizing a...
- Patent number 9,171,122
- Issue date Oct 27, 2015
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hyper-concurrent optimization over multi-corner multi-mode scenarios
- Patent number 9,064,073
- Issue date Jun 23, 2015
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing scenario reduction in a circuit design flow
- Patent number 9,047,426
- Issue date Jun 2, 2015
- Riverbed Technology, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Numerical area recovery
- Patent number 8,990,750
- Issue date Mar 24, 2015
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Numerical delay model for a technology library cell type
- Patent number 8,977,999
- Issue date Mar 10, 2015
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Robust numerical optimization for optimizing delay, area, and leaka...
- Patent number 8,966,430
- Issue date Feb 24, 2015
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Excluding library cells for delay optimization in numerical synthesis
- Patent number 8,949,764
- Issue date Feb 3, 2015
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Estimating optimal gate sizes by using numerical delay models
- Patent number 8,843,871
- Issue date Sep 23, 2014
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accurate approximation of the objective function for solving the ga...
- Patent number 8,826,218
- Issue date Sep 2, 2014
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modeling gate size range by using a penalty function in a numerical...
- Patent number 8,826,217
- Issue date Sep 2, 2014
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identifying candidate nets for buffering using numerical methods
- Patent number 8,799,843
- Issue date Aug 5, 2014
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Numerical delay model for a technology library cell
- Patent number 8,762,905
- Issue date Jun 24, 2014
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing scenario reduction using a dominance relation on a set o...
- Patent number 8,707,241
- Issue date Apr 22, 2014
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing a circuit design for delay using load-and-slew-independe...
- Patent number 8,707,242
- Issue date Apr 22, 2014
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sequential sizing in physical synthesis
- Patent number 8,683,408
- Issue date Mar 25, 2014
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Incremental elmore delay calculation
- Patent number 8,621,405
- Issue date Dec 31, 2013
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modeling transition effects for circuit optimization
- Patent number 8,589,846
- Issue date Nov 19, 2013
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Zone-based optimization framework for performing timing and design...
- Patent number 8,418,116
- Issue date Apr 9, 2013
- Synopsys, Inc.
- Robert Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing scenario reduction
- Patent number 8,413,099
- Issue date Apr 2, 2013
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for determining a robustness metric for a circ...
- Patent number 8,239,800
- Issue date Aug 7, 2012
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INCREMENTAL SLACK MARGIN PROPAGATION
- Publication number 20160012166
- Publication date Jan 14, 2016
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROBUST NUMERICAL OPTIMIZATION FOR OPTIMIZING DELAY, AREA, AND LEAKA...
- Publication number 20150040093
- Publication date Feb 5, 2015
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NUMERICAL AREA RECOVERY
- Publication number 20150040089
- Publication date Feb 5, 2015
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISCRETIZING GATE SIZES DURING NUMERICAL SYNTHESIS
- Publication number 20150040090
- Publication date Feb 5, 2015
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOLVING A GATE-SIZING OPTIMIZATION PROBLEM USING A CONSTRAINTS SOLVER
- Publication number 20150039664
- Publication date Feb 5, 2015
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOLVING AN OPTIMIZATION PROBLEM USING A CONSTRAINTS SOLVER
- Publication number 20150040107
- Publication date Feb 5, 2015
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NUMERICAL DELAY MODEL FOR A TECHNOLOGY LIBRARY CELL TYPE
- Publication number 20140223400
- Publication date Aug 7, 2014
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZING A CIRCUIT DESIGN FOR DELAY USING LOAD-AND-SLEW-INDEPENDE...
- Publication number 20140040851
- Publication date Feb 6, 2014
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINING OPTIMAL GATE SIZES BY USING A NUMERICAL SOLVER
- Publication number 20140033162
- Publication date Jan 30, 2014
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCURATE APPROXIMATION OF THE OBJECTIVE FUNCTION FOR SOLVING THE GA...
- Publication number 20140033161
- Publication date Jan 30, 2014
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODELING GATE SIZE RANGE IN A NUMERICAL GATE SIZING FRAMEWORK
- Publication number 20140033163
- Publication date Jan 30, 2014
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ESTIMATING OPTIMAL GATE SIZES BY USING NUMERICAL DELAY MODELS
- Publication number 20140007037
- Publication date Jan 2, 2014
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREMENTAL ELMORE DELAY CALCULATION
- Publication number 20130326449
- Publication date Dec 5, 2013
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXCLUDING LIBRARY CELLS FOR DELAY OPTIMIZATION IN NUMERICAL SYNTHESIS
- Publication number 20130318488
- Publication date Nov 28, 2013
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NUMERICAL DELAY MODEL FOR A TECHNOLOGY LIBRARY CELL AND/OR A TECHNO...
- Publication number 20130283222
- Publication date Oct 24, 2013
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEQUENTIAL SIZING IN PHYSICAL SYNTHESIS
- Publication number 20130145331
- Publication date Jun 6, 2013
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODELING TRANSITION EFFECTS FOR CIRCUIT OPTIMIZATION
- Publication number 20130145338
- Publication date Jun 6, 2013
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT TIMING CALCULATIONS IN NUMERICAL SEQUENTIAL CELL SIZING A...
- Publication number 20130145339
- Publication date Jun 6, 2013
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYPER-CONCURRENT MULTI-SCENARIO OPTIMIZATION
- Publication number 20120030642
- Publication date Feb 2, 2012
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMING SCENARIO REDUCTION USING A DOMINANCE RELATION ON A SET O...
- Publication number 20120030641
- Publication date Feb 2, 2012
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING SCENARIO REDUCTION
- Publication number 20110302546
- Publication date Dec 8, 2011
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR USING SCENARIO REDUCTION IN A CIRCUIT DESI...
- Publication number 20110302547
- Publication date Dec 8, 2011
- Synopsys, Inc.
- Amir H. Mottaez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GLOBAL TIMING MODELING WITHIN A LOCAL CONTEXT
- Publication number 20110289464
- Publication date Nov 24, 2011
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR DETERMINING A ROBUSTNESS METRIC FOR A CIRC...
- Publication number 20110191732
- Publication date Aug 4, 2011
- Synopsys, Inc.
- Mahesh A. Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ZONE-BASED OPTIMIZATION FRAMEWORK
- Publication number 20110191740
- Publication date Aug 4, 2011
- Synopsys, Inc.
- Robert Walker
- G06 - COMPUTING CALCULATING COUNTING

Amir H. Mottaez

Person

Patents Grantslast 30 patents

Discretizing gate sizes during numerical synthesis

Determining optimal gate sizes by using a numerical solver

Solving an optimization problem using a constraints solver

Solving a gate-sizing optimization problem using a constraints solver

Global timing modeling within a local context

Incremental slack margin propagation

Efficient timing calculations in numerical sequential cell sizing a...

Hyper-concurrent optimization over multi-corner multi-mode scenarios

Performing scenario reduction in a circuit design flow

Numerical area recovery

Numerical delay model for a technology library cell type

Robust numerical optimization for optimizing delay, area, and leaka...

Excluding library cells for delay optimization in numerical synthesis

Estimating optimal gate sizes by using numerical delay models

Accurate approximation of the objective function for solving the ga...

Modeling gate size range by using a penalty function in a numerical...

Identifying candidate nets for buffering using numerical methods

Numerical delay model for a technology library cell

Performing scenario reduction using a dominance relation on a set o...

Optimizing a circuit design for delay using load-and-slew-independe...

Sequential sizing in physical synthesis

Incremental elmore delay calculation

Modeling transition effects for circuit optimization

Zone-based optimization framework for performing timing and design...

Performing scenario reduction

Method and apparatus for determining a robustness metric for a circ...

Patents Applicationslast 30 patents

INCREMENTAL SLACK MARGIN PROPAGATION

ROBUST NUMERICAL OPTIMIZATION FOR OPTIMIZING DELAY, AREA, AND LEAKA...

NUMERICAL AREA RECOVERY

DISCRETIZING GATE SIZES DURING NUMERICAL SYNTHESIS

SOLVING A GATE-SIZING OPTIMIZATION PROBLEM USING A CONSTRAINTS SOLVER

SOLVING AN OPTIMIZATION PROBLEM USING A CONSTRAINTS SOLVER

NUMERICAL DELAY MODEL FOR A TECHNOLOGY LIBRARY CELL TYPE

OPTIMIZING A CIRCUIT DESIGN FOR DELAY USING LOAD-AND-SLEW-INDEPENDE...

DETERMINING OPTIMAL GATE SIZES BY USING A NUMERICAL SOLVER

ACCURATE APPROXIMATION OF THE OBJECTIVE FUNCTION FOR SOLVING THE GA...

MODELING GATE SIZE RANGE IN A NUMERICAL GATE SIZING FRAMEWORK

ESTIMATING OPTIMAL GATE SIZES BY USING NUMERICAL DELAY MODELS

INCREMENTAL ELMORE DELAY CALCULATION

EXCLUDING LIBRARY CELLS FOR DELAY OPTIMIZATION IN NUMERICAL SYNTHESIS

NUMERICAL DELAY MODEL FOR A TECHNOLOGY LIBRARY CELL AND/OR A TECHNO...

SEQUENTIAL SIZING IN PHYSICAL SYNTHESIS

MODELING TRANSITION EFFECTS FOR CIRCUIT OPTIMIZATION

EFFICIENT TIMING CALCULATIONS IN NUMERICAL SEQUENTIAL CELL SIZING A...

HYPER-CONCURRENT MULTI-SCENARIO OPTIMIZATION

PERFORMING SCENARIO REDUCTION USING A DOMINANCE RELATION ON A SET O...

METHOD AND APPARATUS FOR PERFORMING SCENARIO REDUCTION

METHOD AND APPARATUS FOR USING SCENARIO REDUCTION IN A CIRCUIT DESI...

GLOBAL TIMING MODELING WITHIN A LOCAL CONTEXT

METHOD AND APPARATUS FOR DETERMINING A ROBUSTNESS METRIC FOR A CIRC...

ZONE-BASED OPTIMIZATION FRAMEWORK