Amitabh Menon

Person

Milpitas, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory management unit that applies rules based on privilege identi...
- Patent number 9,465,753
- Issue date Oct 11, 2016
- Texas Instruments Incorporated
- Joseph Raymond Michael Zbiciak
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Prefetcher with arbitrary downstream prefetch cancelation
- Patent number 9,239,798
- Issue date Jan 19, 2016
- Texas Instruments Incorporated
- Matthew D Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management unit that applies rules based on privilege identi...
- Patent number 9,110,845
- Issue date Aug 18, 2015
- Texas Instruments Incorporated
- Joseph R. M. Zbiciak
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Flexible memory protection and translation unit
- Patent number 8,806,110
- Issue date Aug 12, 2014
- Texas Instruments Incorporated
- Joseph R. M. Zbiciak
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Memory controller with automatic error detection and correction
- Patent number 8,732,551
- Issue date May 20, 2014
- Texas Instruments Incoporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multilayer arbitration for access to multiple destinations
- Patent number 8,732,370
- Issue date May 20, 2014
- Texas Instruments Incorporated
- Kai Chirca
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Device security features supporting a distributed shared memory system
- Patent number 8,683,114
- Issue date Mar 25, 2014
- Texas Instruments Incorporated
- Joseph R. M. Zbiciak
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Register file bypass with optional results storage and separate pre...
- Patent number 7,725,687
- Issue date May 25, 2010
- Texas Instruments Incorporated
- Amitabh Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter-cluster communication network and heirarchical register files...
- Patent number 7,673,120
- Issue date Mar 2, 2010
- Texas Instruments Incorporated
- David J. Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple patches to on-chip ROM in a processor with a multilevel me...
- Patent number 7,269,707
- Issue date Sep 11, 2007
- Texas Instruments Incorporated
- Amitabh Menon
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Memory Management Unit That Applies Rules Based on Privilege Identi...
- Publication number 20150317259
- Publication date Nov 5, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Raymond Michael Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Management Unit that Applies Rules Based on Privilege Identi...
- Publication number 20120239895
- Publication date Sep 20, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Joseph R.M. Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexible Memory Protection and Translation Unit
- Publication number 20120191899
- Publication date Jul 26, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Joseph R. M. Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Device Security Features Supporting a Distributed Shared Memory System
- Publication number 20120191933
- Publication date Jul 26, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Joseph R.M. Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER WITH AUTOMATIC ERROR DETECTION AND CORRECTION
- Publication number 20120072796
- Publication date Mar 22, 2012
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multilayer Arbitration for Access to Multiple Destinations
- Publication number 20120072631
- Publication date Mar 22, 2012
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCHER WITH ARBITRARY DOWNSTREAM PREFETCH CANCELATION
- Publication number 20120072702
- Publication date Mar 22, 2012
- Matthew D. Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Inter-Cluster Communication Network And Heirarchical Register Files...
- Publication number 20090006816
- Publication date Jan 1, 2009
- David J. Hoyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vector Predicates for Sub-Word Parallel Operations
- Publication number 20080016320
- Publication date Jan 17, 2008
- Amitabh Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register File Bypass With Optional Results Storage and Separate Pre...
- Publication number 20080016327
- Publication date Jan 17, 2008
- Amitabh Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple patches to on-chip ROM in a processor with a multilevel me...
- Publication number 20040163080
- Publication date Aug 19, 2004
- Amitabh Menon
- G06 - COMPUTING CALCULATING COUNTING

Amitabh Menon

Person

Patents Grantslast 30 patents

Memory management unit that applies rules based on privilege identi...

Prefetcher with arbitrary downstream prefetch cancelation

Memory management unit that applies rules based on privilege identi...

Flexible memory protection and translation unit

Memory controller with automatic error detection and correction

Multilayer arbitration for access to multiple destinations

Device security features supporting a distributed shared memory system

Register file bypass with optional results storage and separate pre...

Inter-cluster communication network and heirarchical register files...

Multiple patches to on-chip ROM in a processor with a multilevel me...

Patents Applicationslast 30 patents

Memory Management Unit That Applies Rules Based on Privilege Identi...

Memory Management Unit that Applies Rules Based on Privilege Identi...

Flexible Memory Protection and Translation Unit

Device Security Features Supporting a Distributed Shared Memory System

MEMORY CONTROLLER WITH AUTOMATIC ERROR DETECTION AND CORRECTION

Multilayer Arbitration for Access to Multiple Destinations

PREFETCHER WITH ARBITRARY DOWNSTREAM PREFETCH CANCELATION

Inter-Cluster Communication Network And Heirarchical Register Files...

Vector Predicates for Sub-Word Parallel Operations

Register File Bypass With Optional Results Storage and Separate Pre...

Multiple patches to on-chip ROM in a processor with a multilevel me...