Amrit Kumar Panda

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for decoupling operations to accelerate processin...
- Patent number 11,614,941
- Issue date Mar 28, 2023
- QUALCOMM Incorporated
- Amrit Panda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing multi-element multi-vector (MEMV) register file access in...
- Patent number 11,048,509
- Issue date Jun 29, 2021
- Qualcomm Incorporated
- Hadi Parandeh Afshar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture for sparse neural network acceleration
- Patent number 10,871,964
- Issue date Dec 22, 2020
- QUALCOMM Incorporated
- Yatish Girish Turakhia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing reconfigurable fusion of processing elements (PEs) in vec...
- Patent number 10,846,260
- Issue date Nov 24, 2020
- QUALCOMM Incorporated
- Hadi Parandeh Afshar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling parallel memory accesses by providing explicit affine inst...
- Patent number 10,628,162
- Issue date Apr 21, 2020
- QUALCOMM Incorporated
- Amrit Panda
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROVIDING RECONFIGURABLE FUSION OF PROCESSING ELEMENTS (PEs) IN VEC...
- Publication number 20200012618
- Publication date Jan 9, 2020
- QUALCOMM Incorporated
- Hadi Parandeh Afshar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING PARALLEL MEMORY ACCESSES BY PROVIDING EXPLICIT AFFINE INST...
- Publication number 20190384606
- Publication date Dec 19, 2019
- QUALCOMM Incorporated
- Amrit Panda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING MULTI-ELEMENT MULTI-VECTOR (MEMV) REGISTER FILE ACCESS IN...
- Publication number 20190369994
- Publication date Dec 5, 2019
- QUALCOMM Incorporated
- Hadi Parandeh Afshar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ZERO OVERHEAD LOOP EXECUTION IN DEEP LEARNING ACCELERATORS
- Publication number 20190303156
- Publication date Oct 3, 2019
- QUALCOMM Incorporated
- Amrit PANDA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE FOR SPARSE NEURAL NETWORK ACCELERATION
- Publication number 20180189056
- Publication date Jul 5, 2018
- QUALCOMM Incorporated
- Yatish Girish TURAKHIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-POWER ARCHITECTURE FOR SPARSE NEURAL NETWORK
- Publication number 20180164866
- Publication date Jun 14, 2018
- QUALCOMM Incorporated
- Yatish Girish TURAKHIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Self-adaptive Cache Architecture Based on Run-time Hardware Counter...
- Publication number 20170017576
- Publication date Jan 19, 2017
- QUALCOMM Incorporated
- Rosario Cammarota
- G06 - COMPUTING CALCULATING COUNTING

Amrit Kumar Panda

Person

Patents Grantslast 30 patents

System and method for decoupling operations to accelerate processin...

Providing multi-element multi-vector (MEMV) register file access in...

Architecture for sparse neural network acceleration

Providing reconfigurable fusion of processing elements (PEs) in vec...

Enabling parallel memory accesses by providing explicit affine inst...

Patents Applicationslast 30 patents

PROVIDING RECONFIGURABLE FUSION OF PROCESSING ELEMENTS (PEs) IN VEC...

ENABLING PARALLEL MEMORY ACCESSES BY PROVIDING EXPLICIT AFFINE INST...

PROVIDING MULTI-ELEMENT MULTI-VECTOR (MEMV) REGISTER FILE ACCESS IN...

ZERO OVERHEAD LOOP EXECUTION IN DEEP LEARNING ACCELERATORS

ARCHITECTURE FOR SPARSE NEURAL NETWORK ACCELERATION

LOW-POWER ARCHITECTURE FOR SPARSE NEURAL NETWORK

Self-adaptive Cache Architecture Based on Run-time Hardware Counter...