AMRIT P. SINGH

Person

Ludhiana, IN

People

Patents Grantslast 30 patents

Information Patent Grant
System for controlling data flow between multiple processors
- Patent number 11,507,491
- Issue date Nov 22, 2022
- NXP USA, INC.
- Arvind Kaushik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller for ordering out-of-order transactions in SoC
- Patent number 11,252,108
- Issue date Feb 15, 2022
- NXP USA, INC.
- Arvind Kaushik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Protocol data unit end handling with fractional data alignment and...
- Patent number 11,113,219
- Issue date Sep 7, 2021
- NXP USA, INC.
- Puneet Khandelwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-based memory management for system-on-chip (SoC) integrate...
- Patent number 10,817,413
- Issue date Oct 27, 2020
- NXP USA, INC.
- Kaushik Arvind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for reception and detection of random access channel (RAC...
- Patent number 10,070,465
- Issue date Sep 4, 2018
- NXP USA, INC.
- Girraj K. Agrawal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Scheduler for layer mapped code words
- Patent number 10,045,366
- Issue date Aug 7, 2018
- NXP USA, INC.
- Somvir Dahiya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Configurable FIR filter with segmented cells
- Patent number 9,893,714
- Issue date Feb 13, 2018
- NXP USA, INC.
- Akshat Mittal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for mapping control and user data
- Patent number 9,785,368
- Issue date Oct 10, 2017
- NXP USA, INC.
- Ritika Sharma
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Synchronous bus architecture for digital pre-distortion system
- Patent number 9,665,510
- Issue date May 30, 2017
- FREESCALE SEMICONDUCTOR, INC.
- Arvind Kaushik
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System for calibrating power amplifier
- Patent number 9,231,530
- Issue date Jan 5, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Arvind Kaushik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital pre-distorter
- Patent number 9,130,628
- Issue date Sep 8, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Akshat Mittal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System for compensating for I/Q impairments in wireless communicati...
- Patent number 9,088,472
- Issue date Jul 21, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Nikhil Jain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital adaptive channel equalizer
- Patent number 8,432,960
- Issue date Apr 30, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Girraj K. Agrawal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock generation circuit
- Patent number 7,421,610
- Issue date Sep 2, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Arnab K. Mitra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoder with M-AT-A-Time Traceback
- Patent number 7,404,139
- Issue date Jul 22, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Mohit K. Prasad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-rate viterbi decoder
- Patent number 7,231,586
- Issue date Jun 12, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Mohit K. Prasad
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM FOR CONTROLLING DATA FLOW BETWEEN MULTIPLE PROCESSORS
- Publication number 20220100633
- Publication date Mar 31, 2022
- NXP USA, Inc.
- Arvind Kaushik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Protocol Data Unit End Handling with Fractional Data Alignment and...
- Publication number 20210248098
- Publication date Aug 12, 2021
- NXP USA, Inc.
- Puneet Khandelwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLER FOR ORDERING OUT-OF-ORDER TRANSACTIONS IN SOC
- Publication number 20200403942
- Publication date Dec 24, 2020
- NXP USA, Inc.
- Arvind Kaushik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Hardware-Based Memory Management For System-On-Chip (SOC) Integrate...
- Publication number 20200183823
- Publication date Jun 11, 2020
- NXP USA, Inc.
- Kaushik Arvind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEDULER FOR LAYER MAPPED CODE WORDS
- Publication number 20180020468
- Publication date Jan 18, 2018
- FREESCALE SEMICONDUCTOR, INC.
- SOMVIR DAHIYA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS FOR RECEPTION AND DETECTION OF RANDOM ACCESS CHANNEL (RAC...
- Publication number 20170181192
- Publication date Jun 22, 2017
- FREESCALE SEMICONDUCTOR, INC.
- GIRRAJ K. AGRAWAL
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CONFIGURABLE FIR FILTER WITH SEGMENTED CELLS
- Publication number 20170063346
- Publication date Mar 2, 2017
- FREESCALE SEMICONDUCTOR, INC.
- Akshat Mittal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYNCHRONOUS BUS ARCHITECTURE FOR DIGITAL PRE-DISTORTION SYSTEM
- Publication number 20160179715
- Publication date Jun 23, 2016
- Arvind Kaushik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL ADAPTIVE CHANNEL EQUALIZER
- Publication number 20110228839
- Publication date Sep 22, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Girraj K. Agrawal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR SYMBOL BOUNDARY DETECTION IN ORTHOGONAL FREQU...
- Publication number 20110090973
- Publication date Apr 21, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Mridul Manohar Mishra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION IN A LOW-DENSITY P...
- Publication number 20080086671
- Publication date Apr 10, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Rahul GARG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTI-RATE VITERBI DECODER
- Publication number 20070201586
- Publication date Aug 30, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Mohit K. Prasad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock generation circuit
- Publication number 20070022312
- Publication date Jan 25, 2007
- Arnab K. Mitra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Decoder with M-at-a-time traceback
- Publication number 20060168502
- Publication date Jul 27, 2006
- Mohit K. Prasad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multi-rate viterbi decoder
- Publication number 20060020875
- Publication date Jan 26, 2006
- Mohit K. Prasad
- H03 - BASIC ELECTRONIC CIRCUITRY

AMRIT P. SINGH

Person

Patents Grantslast 30 patents

System for controlling data flow between multiple processors

Controller for ordering out-of-order transactions in SoC

Protocol data unit end handling with fractional data alignment and...

Hardware-based memory management for system-on-chip (SoC) integrate...

Apparatus for reception and detection of random access channel (RAC...

Scheduler for layer mapped code words

Configurable FIR filter with segmented cells

System and method for mapping control and user data

Synchronous bus architecture for digital pre-distortion system

System for calibrating power amplifier

Digital pre-distorter

System for compensating for I/Q impairments in wireless communicati...

Digital adaptive channel equalizer

Clock generation circuit

Decoder with M-AT-A-Time Traceback

Multi-rate viterbi decoder

Patents Applicationslast 30 patents

SYSTEM FOR CONTROLLING DATA FLOW BETWEEN MULTIPLE PROCESSORS

Protocol Data Unit End Handling with Fractional Data Alignment and...

CONTROLLER FOR ORDERING OUT-OF-ORDER TRANSACTIONS IN SOC

Hardware-Based Memory Management For System-On-Chip (SOC) Integrate...

SCHEDULER FOR LAYER MAPPED CODE WORDS

APPARATUS FOR RECEPTION AND DETECTION OF RANDOM ACCESS CHANNEL (RAC...

CONFIGURABLE FIR FILTER WITH SEGMENTED CELLS

SYNCHRONOUS BUS ARCHITECTURE FOR DIGITAL PRE-DISTORTION SYSTEM

DIGITAL ADAPTIVE CHANNEL EQUALIZER

SYSTEM AND METHOD FOR SYMBOL BOUNDARY DETECTION IN ORTHOGONAL FREQU...

SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION IN A LOW-DENSITY P...

MULTI-RATE VITERBI DECODER

Clock generation circuit

Decoder with M-at-a-time traceback

Multi-rate viterbi decoder