Anand Govind

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Robust high density substrate design for thermal cycling reliability
- Patent number 7,345,245
- Issue date Mar 18, 2008
- LSI Logic Corporation
- Anand Govind
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Routing scheme for differential pairs in flip chip substrates
- Patent number 7,105,926
- Issue date Sep 12, 2006
- LSI Logic Corporation
- Arun Ramakrishnan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ball assignment schemes for integrated circuit packages
- Patent number 7,095,107
- Issue date Aug 22, 2006
- LSI Logic Corporation
- Arun Ramakrishnan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate via layout to improve bias humidity testing reliability
- Patent number 7,081,672
- Issue date Jul 25, 2006
- LSI Logic Corporation
- Anand Govind
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Measurement of package interconnect impedance using tester and supp...
- Patent number 6,946,866
- Issue date Sep 20, 2005
- LSI Logic Corporation
- Aritharan Thurairajaratnam
- G01 - MEASURING TESTING
Information Patent Grant
Stiffener design
- Patent number 6,825,066
- Issue date Nov 30, 2004
- LSI Logic Corporation
- Yogendra Ranade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Characteristic impedance equalizer and an integrated circuit packag...
- Patent number 6,759,921
- Issue date Jul 6, 2004
- LSI Logic Corporation
- Anand Govind
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method for reliability testing leakage characteristics in an electr...
- Patent number 6,701,270
- Issue date Mar 2, 2004
- LSI Logic Corporation
- Leah M. Miller
- G01 - MEASURING TESTING
Information Patent Grant
Flip-chip ball grid array package for electromigration testing
- Patent number 6,700,207
- Issue date Mar 2, 2004
- LSI Logic Corporation
- Senol Pekin
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit test vehicle
- Patent number 6,534,968
- Issue date Mar 18, 2003
- LSI Logic Corporation
- Leah M. Miller
- G01 - MEASURING TESTING
Information Patent Grant
Microstrip package having optimized signal line impedance control
- Patent number 6,531,932
- Issue date Mar 11, 2003
- LSI Logic Corporation
- Anand Govind
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transmission equalization system and an integrated circuit package...
- Patent number 6,496,081
- Issue date Dec 17, 2002
- LSI Logic Corporation
- Anand Govind
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Ball assignment schemes for integrated circuit packages
- Publication number 20060118929
- Publication date Jun 8, 2006
- LSI Logic Corporation
- Arun Ramakrishnan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Routing scheme for differential pairs in flip chip substrates
- Publication number 20050110167
- Publication date May 26, 2005
- LSI Logic Corporation
- Arun Ramakrishnan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Robust high density substrate design for thermal cycling reliability
- Publication number 20050077081
- Publication date Apr 14, 2005
- Anand Govind
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Measurement of package interconnect impedance using tester and supp...
- Publication number 20040251925
- Publication date Dec 16, 2004
- Aritharan Thurairajaratnam
- G01 - MEASURING TESTING
Information Patent Application
Stiffener design
- Publication number 20040105241
- Publication date Jun 3, 2004
- Yogendra Ranade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLIP-CHIP BALL GRID ARRAY PACKAGE FOR ELECTROMIGRATION TESTING
- Publication number 20040021232
- Publication date Feb 5, 2004
- Senol Pekin
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Anand Govind

Person

Patents Grantslast 30 patents

Robust high density substrate design for thermal cycling reliability

Routing scheme for differential pairs in flip chip substrates

Ball assignment schemes for integrated circuit packages

Substrate via layout to improve bias humidity testing reliability

Measurement of package interconnect impedance using tester and supp...

Stiffener design

Characteristic impedance equalizer and an integrated circuit packag...

Method for reliability testing leakage characteristics in an electr...

Flip-chip ball grid array package for electromigration testing

Integrated circuit test vehicle

Microstrip package having optimized signal line impedance control

Transmission equalization system and an integrated circuit package...

Patents Applicationslast 30 patents

Ball assignment schemes for integrated circuit packages

Routing scheme for differential pairs in flip chip substrates

Robust high density substrate design for thermal cycling reliability

Measurement of package interconnect impedance using tester and supp...

Stiffener design

FLIP-CHIP BALL GRID ARRAY PACKAGE FOR ELECTROMIGRATION TESTING