Anand MISHRA

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Greater Noida, IN

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Patents Grantslast 30 patents

Information Patent Grant
Device and method for monitoring data and timing signals in integra...
- Patent number 11,635,465
- Issue date Apr 25, 2023
- STMICROELECTRONICS INTERNATIONAL N.V.
- Rohit Goel
- G01 - MEASURING TESTING
Information Patent Grant
Write circuitry for hierarchical memory architectures
- Patent number 8,649,230
- Issue date Feb 11, 2014
- STMicroelectronics International N.V.
- Siddharth Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Write circuitry for hierarchical memory architectures
- Patent number 8,526,246
- Issue date Sep 3, 2013
- STMicroelectronics International N.V.
- Siddharth Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Balanced sense amplifier for single ended bitline memory architecture
- Patent number 8,144,537
- Issue date Mar 27, 2012
- STMicroelectronics Pvt. Ltd.
- Anand Kumar Mishra
- G11 - INFORMATION STORAGE
Information Patent Grant
Write circuitry for hierarchical memory architecture
- Patent number 8,130,567
- Issue date Mar 6, 2012
- STMicroelectronics Pvt. Ltd.
- Siddharth Gupta
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DEVICE AND METHOD FOR MONITORING DATA AND TIMING SIGNALS IN INTEGRA...
- Publication number 20220137133
- Publication date May 5, 2022
- STMicroelectronics International N.V.
- Rohit GOEL
- G01 - MEASURING TESTING
Information Patent Application
WRITE CIRCUITRY FOR HIERARCHICAL MEMORY ARCHITECTURES
- Publication number 20130343137
- Publication date Dec 26, 2013
- STMicroelectronics International N.V
- Siddharth GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE CIRCUITRY FOR HIERARCHICAL MEMORY ARCHITECTURES
- Publication number 20120140582
- Publication date Jun 7, 2012
- STMICROELECTRONICS PVT. LTD.
- Siddharth GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
BALANCED SENSE AMPLIFIER FOR SINGLE ENDED BITLINE MEMORY ARCHITECTURE
- Publication number 20100172199
- Publication date Jul 8, 2010
- STMicroelectronics Pvt, Ltd.
- Anand Kumar Mishra
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE CIRCUITRY FOR HIERARCHICAL MEMORY ARCHITECTURE
- Publication number 20100157699
- Publication date Jun 24, 2010
- STMICROELECTRONICS PVT. LTD.
- Siddharth GUPTA
- G11 - INFORMATION STORAGE