Anatoli Bolotov

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Moscow, RU

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for formula area and delay minimization
- Patent number 6,587,990
- Issue date Jul 1, 2003
- LSI Logic Corporation
- Alexander Andreev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for locating constants in combinational circuits
- Patent number 6,536,016
- Issue date Mar 18, 2003
- LSI Logic Corporation
- Alexander Andreev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for detecting equivalent and anti-equivalent pins
- Patent number 6,530,063
- Issue date Mar 4, 2003
- LSI Logic Corporation
- Alexander Andreev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for minimization of net delay by optimal buffe...
- Patent number 6,519,746
- Issue date Feb 11, 2003
- LSI Logic Corporation
- Alexander Andreev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modifying timing graph to avoid given set of paths
- Patent number 6,292,924
- Issue date Sep 18, 2001
- LSI Logic Corporation
- Ivan Pavisic
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MODIFYING TIMING GRAPH TO AVOID GIVEN SET OF PATHS
- Publication number 20010020289
- Publication date Sep 6, 2001
- IVAN PAVISIC
- G06 - COMPUTING CALCULATING COUNTING