Andrea Martinelli

Person

Gazzaniga, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit partitioning for a memory device
- Patent number 12,182,432
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Andrea Martinelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with data scrubbing capability and methods
- Patent number 12,086,421
- Issue date Sep 10, 2024
- Micron Technology, Inc.
- Graziano Mirichigni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bank configurable power modes
- Patent number 12,045,113
- Issue date Jul 23, 2024
- Micron Technology, Inc.
- Graziano Mirichigni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Program current controller and sense circuit for cross-point memory...
- Patent number 12,002,510
- Issue date Jun 4, 2024
- Micron Technology, Inc.
- Andrea Ghetti
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared decoder architecture for three-dimensional memory arrays
- Patent number 11,967,372
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for parallel memory cell access
- Patent number 11,948,638
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel access in a memory array
- Patent number 11,915,740
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Efrem Bolandrina
- G11 - INFORMATION STORAGE
Information Patent Grant
Input/output line sharing for memory arrays
- Patent number 11,830,570
- Issue date Nov 28, 2023
- Micron Technology, Inc.
- Christopher Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoding architecture for memory tiles
- Patent number 11,804,264
- Issue date Oct 31, 2023
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture-based power management for a memory device
- Patent number 11,740,678
- Issue date Aug 29, 2023
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Balancing data for storage in a memory device
- Patent number 11,733,913
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Access schemes for activity-based data protection in a memory device
- Patent number 11,651,809
- Issue date May 16, 2023
- Micron Technology, Inc.
- Corrado Villa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoding architecture for memory tiles
- Patent number 11,475,947
- Issue date Oct 18, 2022
- Micron Technology, Inc.
- Paolo Fantini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Balancing data for storage in a memory device
- Patent number 11,262,937
- Issue date Mar 1, 2022
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture-based power management for a memory device
- Patent number 11,243,596
- Issue date Feb 8, 2022
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuitry borrowing for memory arrays
- Patent number 11,217,291
- Issue date Jan 4, 2022
- Micron Technology, Inc.
- Andrea Martinelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Input/output line sharing for memory arrays
- Patent number 11,152,039
- Issue date Oct 19, 2021
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit partitioning for a memory device
- Patent number 11,144,228
- Issue date Oct 12, 2021
- Micron Technology, Inc.
- Andrea Martinelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatuses for performing a voltage adjustment operatio...
- Patent number 10,991,411
- Issue date Apr 27, 2021
- Micron Technology, Inc.
- Corrado Villa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Staggered programming for resistive memories
- Patent number 9,164,894
- Issue date Oct 20, 2015
- Micron Technology, Inc.
- Gerald Barkley
- G11 - INFORMATION STORAGE
Information Patent Grant
Code patching for non-volatile memory
- Patent number 9,038,044
- Issue date May 19, 2015
- Micron Technology, Inc.
- Massimiliano Mollichelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Staggered programming for resistive memories
- Patent number 8,639,903
- Issue date Jan 28, 2014
- Micron Technology, Inc.
- Gerald Barkley
- G11 - INFORMATION STORAGE
Information Patent Grant
Code patching for non-volatile memory
- Patent number 8,607,210
- Issue date Dec 10, 2013
- Micron Technology, Inc.
- Massimiliano Mollichelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized flash memory access method and device
- Patent number 8,539,141
- Issue date Sep 17, 2013
- Micron Technnology, Inc.
- Christophe Laurent
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic device comprising non volatile memory cells and correspo...
- Patent number 8,284,623
- Issue date Oct 9, 2012
- Micron Technology, Inc.
- Andrea Martinelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Optimized flash memory access method and device
- Patent number 8,015,345
- Issue date Sep 6, 2011
- Christophe Laurent
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic device comprising non volatile memory cells and correspo...
- Patent number 7,940,590
- Issue date May 10, 2011
- Andrea Martinelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for programming a memory device suitable to minimize floatin...
- Patent number 7,688,633
- Issue date Mar 30, 2010
- Andrea Martinelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Non volatile memory device architecture and corresponding programmi...
- Patent number 7,649,791
- Issue date Jan 19, 2010
- Andrea Martinelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronization of operations in distinct memory partitions
- Patent number 7,515,464
- Issue date Apr 7, 2009
- Daniele Vimercati
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE WITH DATA SCRUBBING CAPABILITY AND METHODS
- Publication number 20240393961
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Graziano Mirichigni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BANK CONFIGURABLE POWER MODES
- Publication number 20240353914
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Graziano Mirichigni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAM CURRENT CONTROLLER AND SENSE CIRCUIT FOR CROSS-POINT MEMORY...
- Publication number 20240321355
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Andrea Ghetti
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20240321349
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR PARALLEL MEMORY CELL ACCESS
- Publication number 20240304244
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
PARALLEL ACCESS IN A MEMORY ARRAY
- Publication number 20240274183
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Efrem Bolandrina
- G11 - INFORMATION STORAGE
Information Patent Application
STREAMING MODE FOR ACCESSING MEMORY CELLS IN A MEMORY DEVICE
- Publication number 20240071476
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Andrea Martinelli
- G11 - INFORMATION STORAGE
Information Patent Application
DRIFT CORRECTION IN SLC AND MLC MEMORY DEVICES
- Publication number 20240071483
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE-BASED POWER MANAGEMENT FOR A MEMORY DEVICE
- Publication number 20240028099
- Publication date Jan 25, 2024
- Lodestar Licensing Group, LLC
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TOGGLING KNOWN PATTERNS FOR READING MEMORY CELLS IN A MEMORY DEVICE
- Publication number 20240012576
- Publication date Jan 11, 2024
- Micron Technology, Inc.
- Andrea Martinelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ARRAY SEASONING
- Publication number 20230395136
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Andrea Martinelli
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20230307041
- Publication date Sep 28, 2023
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G11 - INFORMATION STORAGE
Information Patent Application
PARALLEL ACCESS IN A MEMORY ARRAY
- Publication number 20230282270
- Publication date Sep 7, 2023
- Micron Technology, Inc.
- Efrem Bolandrina
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR PARALLEL MEMORY CELL ACCESS
- Publication number 20230260576
- Publication date Aug 17, 2023
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAM CURRENT CONTROLLER AND SENSE CIRCUIT FOR CROSS-POINT MEMORY...
- Publication number 20230245701
- Publication date Aug 3, 2023
- Micron Technology, Inc.
- Andrea Ghetti
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH DATA SCRUBBING CAPABILITY AND METHODS
- Publication number 20230176747
- Publication date Jun 8, 2023
- Micron Technology, Inc.
- Graziano Mirichigni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECODING ARCHITECTURE FOR MEMORY TILES
- Publication number 20230071663
- Publication date Mar 9, 2023
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
DECODING ARCHITECTURE FOR MEMORY TILES
- Publication number 20220336015
- Publication date Oct 20, 2022
- Micron Technology, Inc.
- Paolo Fantini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BALANCING DATA FOR STORAGE IN A MEMORY DEVICE
- Publication number 20220253237
- Publication date Aug 11, 2022
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUITRY BORROWING FOR MEMORY ARRAYS
- Publication number 20220199137
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Andrea Martinelli
- G11 - INFORMATION STORAGE
Information Patent Application
ARCHITECTURE-BASED POWER MANAGEMENT FOR A MEMORY DEVICE
- Publication number 20220129058
- Publication date Apr 28, 2022
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INPUT/OUTPUT LINE SHARING FOR MEMORY ARRAYS
- Publication number 20220122643
- Publication date Apr 21, 2022
- Micron Technology, Inc.
- Christopher Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT PARTITIONING FOR A MEMORY DEVICE
- Publication number 20220100404
- Publication date Mar 31, 2022
- Micron Technology, Inc.
- Andrea Martinelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BALANCING DATA FOR STORAGE IN A MEMORY DEVICE
- Publication number 20210342090
- Publication date Nov 4, 2021
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCESS SCHEMES FOR ACTIVITY-BASED DATA PROTECTION IN A MEMORY DEVICE
- Publication number 20210335407
- Publication date Oct 28, 2021
- Micron Technology, Inc.
- Corrado Villa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE-BASED POWER MANAGEMENT FOR A MEMORY DEVICE
- Publication number 20210064113
- Publication date Mar 4, 2021
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BANK CONFIGURABLE POWER MODES
- Publication number 20210064119
- Publication date Mar 4, 2021
- Micron Technology, Inc.
- Graziano Mirichigni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT PARTITIONING FOR A MEMORY DEVICE
- Publication number 20210011645
- Publication date Jan 14, 2021
- Micron Technology, Inc.
- Andrea Martinelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INPUT/OUTPUT LINE SHARING FOR MEMORY ARRAYS
- Publication number 20210012817
- Publication date Jan 14, 2021
- Micron Technology, Inc.
- Christopher Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUITRY BORROWING FOR MEMORY ARRAYS
- Publication number 20210012825
- Publication date Jan 14, 2021
- Micron Technology, Inc.
- Andrea Martinelli
- G11 - INFORMATION STORAGE

Andrea Martinelli

Person

Patents Grantslast 30 patents

Circuit partitioning for a memory device

Memory device with data scrubbing capability and methods

Bank configurable power modes

Program current controller and sense circuit for cross-point memory...

Shared decoder architecture for three-dimensional memory arrays

Techniques for parallel memory cell access

Parallel access in a memory array

Input/output line sharing for memory arrays

Decoding architecture for memory tiles

Architecture-based power management for a memory device

Balancing data for storage in a memory device

Access schemes for activity-based data protection in a memory device

Decoding architecture for memory tiles

Balancing data for storage in a memory device

Architecture-based power management for a memory device

Circuitry borrowing for memory arrays

Input/output line sharing for memory arrays

Circuit partitioning for a memory device

Method and apparatuses for performing a voltage adjustment operatio...

Staggered programming for resistive memories

Code patching for non-volatile memory

Staggered programming for resistive memories

Code patching for non-volatile memory

Optimized flash memory access method and device

Electronic device comprising non volatile memory cells and correspo...

Optimized flash memory access method and device

Electronic device comprising non volatile memory cells and correspo...

Method for programming a memory device suitable to minimize floatin...

Non volatile memory device architecture and corresponding programmi...

Synchronization of operations in distinct memory partitions

Patents Applicationslast 30 patents

MEMORY DEVICE WITH DATA SCRUBBING CAPABILITY AND METHODS

BANK CONFIGURABLE POWER MODES

PROGRAM CURRENT CONTROLLER AND SENSE CIRCUIT FOR CROSS-POINT MEMORY...

SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS

TECHNIQUES FOR PARALLEL MEMORY CELL ACCESS

PARALLEL ACCESS IN A MEMORY ARRAY

STREAMING MODE FOR ACCESSING MEMORY CELLS IN A MEMORY DEVICE

DRIFT CORRECTION IN SLC AND MLC MEMORY DEVICES

ARCHITECTURE-BASED POWER MANAGEMENT FOR A MEMORY DEVICE

TOGGLING KNOWN PATTERNS FOR READING MEMORY CELLS IN A MEMORY DEVICE

MEMORY ARRAY SEASONING

SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS

PARALLEL ACCESS IN A MEMORY ARRAY

TECHNIQUES FOR PARALLEL MEMORY CELL ACCESS

PROGRAM CURRENT CONTROLLER AND SENSE CIRCUIT FOR CROSS-POINT MEMORY...

MEMORY DEVICE WITH DATA SCRUBBING CAPABILITY AND METHODS

DECODING ARCHITECTURE FOR MEMORY TILES

DECODING ARCHITECTURE FOR MEMORY TILES

BALANCING DATA FOR STORAGE IN A MEMORY DEVICE

CIRCUITRY BORROWING FOR MEMORY ARRAYS

ARCHITECTURE-BASED POWER MANAGEMENT FOR A MEMORY DEVICE

INPUT/OUTPUT LINE SHARING FOR MEMORY ARRAYS

CIRCUIT PARTITIONING FOR A MEMORY DEVICE

BALANCING DATA FOR STORAGE IN A MEMORY DEVICE

ACCESS SCHEMES FOR ACTIVITY-BASED DATA PROTECTION IN A MEMORY DEVICE

ARCHITECTURE-BASED POWER MANAGEMENT FOR A MEMORY DEVICE

BANK CONFIGURABLE POWER MODES

CIRCUIT PARTITIONING FOR A MEMORY DEVICE

INPUT/OUTPUT LINE SHARING FOR MEMORY ARRAYS

CIRCUITRY BORROWING FOR MEMORY ARRAYS