Andreas Felber

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor product having a semiconductor substrate and a test s...
- Patent number 7,205,567
- Issue date Apr 17, 2007
- Infineon Technologies AG
- Andreas Felber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated semiconductor circuit with an electrically programmable...
- Patent number 7,126,204
- Issue date Oct 24, 2006
- Infineon Technologies AG
- Ulrich Frey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test structure for a single-sided buried strap DRAM memory cell array
- Patent number 7,126,154
- Issue date Oct 24, 2006
- Infineon Technologies AG
- Valentine Rosskopf
- G11 - INFORMATION STORAGE
Information Patent Grant
Device architecture and process for improved vertical memory arrays
- Patent number 6,930,324
- Issue date Aug 16, 2005
- Infineon Technologies AG
- Bernhard Kowalski
- G11 - INFORMATION STORAGE
Information Patent Grant
Test structure for improved vertical memory arrays
- Patent number 6,930,325
- Issue date Aug 16, 2005
- Infineon Technologies AG
- Bernhard Kowalski
- G11 - INFORMATION STORAGE
Information Patent Grant
Test structure for determining a short circuit between trench capac...
- Patent number 6,897,077
- Issue date May 24, 2005
- Infineon Technologies AG
- Andreas Felber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test structure for determining a region of a deep trench outdiffusi...
- Patent number 6,878,965
- Issue date Apr 12, 2005
- Infineon Technologies AG
- Andreas Felber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test structure for measuring a junction resistance in a DRAM memory...
- Patent number 6,856,562
- Issue date Feb 15, 2005
- Infineon Technologies AG
- Susanne Lachenmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Test structure for determining a doping region of an electrode conn...
- Patent number 6,853,000
- Issue date Feb 8, 2005
- Infineon Technologies AG
- Andreas Felber
- G11 - INFORMATION STORAGE
Information Patent Grant
Transistor array and semiconductor memory configuration fabricated...
- Patent number 6,838,724
- Issue date Jan 4, 2005
- Infineon Technologies AG
- Bernhard Kowalski
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor product having a semiconductor substrate and a test s...
- Publication number 20060175647
- Publication date Aug 10, 2006
- Andreas Felber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated semiconductor circuit with an electrically programmable...
- Publication number 20050073024
- Publication date Apr 7, 2005
- Ulrich Frey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Test structure for a single-sided buried strap DRAM memory cell array
- Publication number 20050051765
- Publication date Mar 10, 2005
- Infineon Technologies AG
- Valentin Rosskopf
- G11 - INFORMATION STORAGE
Information Patent Application
Test structure for improved vertical memory arrays
- Publication number 20050040398
- Publication date Feb 24, 2005
- Bernhard Kowalski
- G11 - INFORMATION STORAGE
Information Patent Application
Device architecture and process for improved vertical memory arrays
- Publication number 20040245569
- Publication date Dec 9, 2004
- Bernhard Kowalski
- G11 - INFORMATION STORAGE
Information Patent Application
Transistor array and semiconductor memory configuration fabricated...
- Publication number 20040104418
- Publication date Jun 3, 2004
- Bernhard Kowalski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Test structure for determining a short circuit between trench capac...
- Publication number 20040061112
- Publication date Apr 1, 2004
- Andreas Felber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Test structure for determining a region of a deep trench outdiffusi...
- Publication number 20040061111
- Publication date Apr 1, 2004
- Andreas Felber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Test structure for determining a doping region of an electrode conn...
- Publication number 20040061110
- Publication date Apr 1, 2004
- Andreas Felber
- G11 - INFORMATION STORAGE
Information Patent Application
Test structure for measuring a junction resistance in a DRAM memory...
- Publication number 20040057292
- Publication date Mar 25, 2004
- Susanne Lachenmann
- G11 - INFORMATION STORAGE

Andreas Felber

Person

Patents Grantslast 30 patents

Semiconductor product having a semiconductor substrate and a test s...

Integrated semiconductor circuit with an electrically programmable...

Test structure for a single-sided buried strap DRAM memory cell array

Device architecture and process for improved vertical memory arrays

Test structure for improved vertical memory arrays

Test structure for determining a short circuit between trench capac...

Test structure for determining a region of a deep trench outdiffusi...

Test structure for measuring a junction resistance in a DRAM memory...

Test structure for determining a doping region of an electrode conn...

Transistor array and semiconductor memory configuration fabricated...

Patents Applicationslast 30 patents

Semiconductor product having a semiconductor substrate and a test s...

Integrated semiconductor circuit with an electrically programmable...

Test structure for a single-sided buried strap DRAM memory cell array

Test structure for improved vertical memory arrays

Device architecture and process for improved vertical memory arrays

Transistor array and semiconductor memory configuration fabricated...

Test structure for determining a short circuit between trench capac...

Test structure for determining a region of a deep trench outdiffusi...

Test structure for determining a doping region of an electrode conn...

Test structure for measuring a junction resistance in a DRAM memory...