Andreas Kuehlmann

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Software and hardware emulation system
- Patent number 10,713,069
- Issue date Jul 14, 2020
- Synopsys, Inc.
- Marat Boshernitsan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Static analysis of computer code to determine impact of change to a...
- Patent number 9,836,390
- Issue date Dec 5, 2017
- Synopsys, Inc.
- Marat Boshernitsan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prioritization of tests of computer program code
- Patent number 9,612,943
- Issue date Apr 4, 2017
- Synopsys, Inc.
- Marat Boshernitsan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Policy evaluation based upon dynamic observation, static analysis a...
- Patent number 9,317,399
- Issue date Apr 19, 2016
- Synopsys, Inc.
- Marat Boshernitsan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Static analysis of computer code to determine impact of change to a...
- Patent number 9,032,376
- Issue date May 12, 2015
- Synopsys, Inc.
- Marat Boshernitsan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
General numeric backtracking algorithm for solving satifiability pr...
- Patent number 8,862,439
- Issue date Oct 14, 2014
- Cadence Design Systems, Inc.
- Andreas Kuehlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus with general numeric backtracking algorithm for solving s...
- Patent number 8,656,330
- Issue date Feb 18, 2014
- Cadence Design Systems, Inc.
- Andreas Kuehlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing integrated circuit design through use of sequential timi...
- Patent number 8,589,845
- Issue date Nov 19, 2013
- Christoph Albrecht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temporal decomposition for design and verification
- Patent number 8,418,101
- Issue date Apr 9, 2013
- Cadence Designs Systems, Inc.
- Andreas Kuehlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temporal decomposition for design and verification
- Patent number 8,413,090
- Issue date Apr 2, 2013
- Cadence Design Systems, Inc.
- Andreas Kuehlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing critical cycle delay in an integrated circuit design throu...
- Patent number 8,307,316
- Issue date Nov 6, 2012
- Cadence Design Systems, Inc.
- Christoph Albrecht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, methods and apparatus for generation of simulation stimulus
- Patent number 8,020,125
- Issue date Sep 13, 2011
- Cadence Design Systems, Inc.
- Andreas Kuehlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing critical cycle delay in an integrated circuit design throu...
- Patent number 7,913,210
- Issue date Mar 22, 2011
- Cadence Design Systems, Inc.
- Christoph Albrecht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temporal decomposition for design and verification
- Patent number 7,900,173
- Issue date Mar 1, 2011
- Cadence Design Systems, Inc.
- Andreas Kuehlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing integrated circuit design through use of sequential timi...
- Patent number 7,743,354
- Issue date Jun 22, 2010
- Cadence Design Systems, Inc.
- Christoph Albrecht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data path and placement optimization in an integrated circuit throu...
- Patent number 7,624,364
- Issue date Nov 24, 2009
- Cadence Design Systems, Inc.
- Christoph Albrecht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temporal decomposition for design and verification
- Patent number 7,596,770
- Issue date Sep 29, 2009
- Cadence Design Systems, Inc.
- Andreas Kuehlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimization of combinational logic synthesis through clock latency...
- Patent number 7,559,040
- Issue date Jul 7, 2009
- Cadence Design Systems, Inc.
- Christoph Albrecht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-domain clock skew scheduling
- Patent number 7,296,246
- Issue date Nov 13, 2007
- Cadence Design Systems, Inc.
- Andreas Kuehlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Framework for multiple-engine based verification tools for integrat...
- Patent number 6,698,003
- Issue date Feb 24, 2004
- International Business Machines Corporation
- Jason Raymond Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for equivalence-checking combinatorial circuits u...
- Patent number 6,473,884
- Issue date Oct 29, 2002
- International Business Machines Corporation
- Malay Kumar Ganai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for performing functional comparison of combinational circuits
- Patent number 6,035,107
- Issue date Mar 7, 2000
- International Bunsiness Machines Corporation
- Andreas Kuehlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CMOS transistor network to gate level model extractor for simulatio...
- Patent number 5,629,858
- Issue date May 13, 1997
- International Business Machines Corporation
- Sandip Kundu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Using Information Flow For Security Exploration and Analysis
- Publication number 20230394158
- Publication date Dec 7, 2023
- Tortuga Logic Inc.
- Jason K. Oberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using Information Flow for Security Aware Design and Analysis
- Publication number 20230394207
- Publication date Dec 7, 2023
- Tortuga Logic Inc.
- Jason K. Oberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Software and Hardware Emulation System
- Publication number 20170017506
- Publication date Jan 19, 2017
- Synopsys, Inc.
- Marat Boshernitsan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STATIC ANALYSIS OF COMPUTER CODE TO DETERMINE IMPACT OF CHANGE TO A...
- Publication number 20150317236
- Publication date Nov 5, 2015
- Synopsys, Inc.
- Marat Boshernitsan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIORITIZATION OF TESTS OF COMPUTER PROGRAM CODE
- Publication number 20150007140
- Publication date Jan 1, 2015
- Coverity, Inc.
- Marat Boshernitsan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STATIC ANALYSIS OF COMPUTER CODE TO DETERMINE IMPACT OF CHANGE TO A...
- Publication number 20140130020
- Publication date May 8, 2014
- Coverity, Inc.
- Marat Boshernitsan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POLICY EVALUATION BASED UPON DYNMAMIC OBSERVATION, STATIC ANALYSIS...
- Publication number 20140096113
- Publication date Apr 3, 2014
- Andreas Kuehlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING CRITICAL CYCLE DELAY IN AN INTEGRATED CIRCUIT DESIGN THROU...
- Publication number 20110252389
- Publication date Oct 13, 2011
- Cadence Design Systems, Inc.
- Christoph ALBRECHT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZING INTEGRATED CIRCUIT DESIGN THROUGH USE OF SEQUENTIAL TIMI...
- Publication number 20100115477
- Publication date May 6, 2010
- Cadence Design Systems, Inc.
- Christoph ALBRECHT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimizing integrated circuit design through use of sequential timi...
- Publication number 20080276210
- Publication date Nov 6, 2008
- Christoph Albrecht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZING INTEGRATED CIRCUIT DESIGN THROUGH USE OF SEQUENTIAL TIMI...
- Publication number 20080276208
- Publication date Nov 6, 2008
- Christoph Albrecht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimizing integrated circuit design through use of sequential timi...
- Publication number 20080276209
- Publication date Nov 6, 2008
- Christoph Albrecht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Framework for multiple-engine based verification tools for integrat...
- Publication number 20030110455
- Publication date Jun 12, 2003
- International Business Machines Corporation
- Jason Raymond Baumgartner
- G06 - COMPUTING CALCULATING COUNTING

Andreas Kuehlmann

Person

Patents Grantslast 30 patents

Software and hardware emulation system

Static analysis of computer code to determine impact of change to a...

Prioritization of tests of computer program code

Policy evaluation based upon dynamic observation, static analysis a...

Static analysis of computer code to determine impact of change to a...

General numeric backtracking algorithm for solving satifiability pr...

Apparatus with general numeric backtracking algorithm for solving s...

Optimizing integrated circuit design through use of sequential timi...

Temporal decomposition for design and verification

Temporal decomposition for design and verification

Reducing critical cycle delay in an integrated circuit design throu...

System, methods and apparatus for generation of simulation stimulus

Reducing critical cycle delay in an integrated circuit design throu...

Temporal decomposition for design and verification

Optimizing integrated circuit design through use of sequential timi...

Data path and placement optimization in an integrated circuit throu...

Temporal decomposition for design and verification

Optimization of combinational logic synthesis through clock latency...

Multi-domain clock skew scheduling

Framework for multiple-engine based verification tools for integrat...

Method and system for equivalence-checking combinatorial circuits u...

Method for performing functional comparison of combinational circuits

CMOS transistor network to gate level model extractor for simulatio...

Patents Applicationslast 30 patents

Using Information Flow For Security Exploration and Analysis

Using Information Flow for Security Aware Design and Analysis

Software and Hardware Emulation System

STATIC ANALYSIS OF COMPUTER CODE TO DETERMINE IMPACT OF CHANGE TO A...

PRIORITIZATION OF TESTS OF COMPUTER PROGRAM CODE

STATIC ANALYSIS OF COMPUTER CODE TO DETERMINE IMPACT OF CHANGE TO A...

POLICY EVALUATION BASED UPON DYNMAMIC OBSERVATION, STATIC ANALYSIS...

REDUCING CRITICAL CYCLE DELAY IN AN INTEGRATED CIRCUIT DESIGN THROU...

OPTIMIZING INTEGRATED CIRCUIT DESIGN THROUGH USE OF SEQUENTIAL TIMI...

Optimizing integrated circuit design through use of sequential timi...

OPTIMIZING INTEGRATED CIRCUIT DESIGN THROUGH USE OF SEQUENTIAL TIMI...

Optimizing integrated circuit design through use of sequential timi...

Framework for multiple-engine based verification tools for integrat...