Andrew Jonathan White

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Distributed contiguous reads in a network on a chip architecture
- Patent number 10,346,049
- Issue date Jul 9, 2019
- FRIDAY HARBOR LLC
- Andrew White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Writing to contiguous memory addresses in a network on a chip archi...
- Patent number 10,152,352
- Issue date Dec 11, 2018
- FRIDAY HARBOR LLC
- Andy White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DMA engine for transferring data in a network-on-a-chip processor
- Patent number 10,078,606
- Issue date Sep 18, 2018
- KNUEDGE, INC.
- Douglas A. Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chained packet sequences in a network on a chip architecture
- Patent number 10,027,583
- Issue date Jul 17, 2018
- KnuEdge Incorporated
- Andrew White
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Synchronization in a multi-processor computing system
- Patent number 9,910,716
- Issue date Mar 6, 2018
- KnuEdge Incorporated
- Douglas B. Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing write operations in a network on a chip device
- Patent number 9,864,519
- Issue date Jan 9, 2018
- KnuEdge Incorporated
- Doug Meyer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Performing read operations in network on a chip architecture
- Patent number 9,686,191
- Issue date Jun 20, 2017
- KnuEdge Incorporation
- Andy White
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SECURE PAYMENT SYSTEMS AND METHODS
- Publication number 20220414625
- Publication date Dec 29, 2022
- Closinglock, LLC
- Andrew J. White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMING A SYNCHRONIZATION OPERATION ON AN ELECTRONIC DEVICE
- Publication number 20170357705
- Publication date Dec 14, 2017
- KnuEdge Incorporated
- Mario Mendez Lojo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Distributed Contiguous Reads in a Network on a Chip Architecture
- Publication number 20170315726
- Publication date Nov 2, 2017
- KnuEdge Incorporated
- Andrew White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Chained Packet Sequences in a Network on a Chip Architecture
- Publication number 20170279714
- Publication date Sep 28, 2017
- KnuEdge Incorporated
- Andrew White
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Synchronization in a Multi-Processor Computing System
- Publication number 20170262318
- Publication date Sep 14, 2017
- KnuEdge Incorporated
- Douglas B. Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINING AN OPERATION STATE WITHIN A COMPUTING SYSTEM WITH MULTI...
- Publication number 20170220520
- Publication date Aug 3, 2017
- KnuEdge Incorporated
- Douglas Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMART DMA ENGINE FOR A NETWORK-ON-A-CHIP PROCESSOR
- Publication number 20170153993
- Publication date Jun 1, 2017
- KNUEDGE, INC.
- Douglas A. Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Writing to Contiguous Memory Addresses in a Network on a Chip Archi...
- Publication number 20170139644
- Publication date May 18, 2017
- Intellisis Corporation
- Andy White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER COMMUNICATION IN A NETWORK-ON-A-CHIP ARCHITECTURE
- Publication number 20170116154
- Publication date Apr 27, 2017
- The Intellisis Corporation
- Douglas A. Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Write Operations In A Network On A Chip Device
- Publication number 20170060420
- Publication date Mar 2, 2017
- KnuEdge Incorporated
- Doug Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Read Operations in Network on a Chip Architecture
- Publication number 20170054635
- Publication date Feb 23, 2017
- Knu Edge Incorporated
- Andy White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronization in a Computing System with Multi-Core Processing De...
- Publication number 20160224502
- Publication date Aug 4, 2016
- The Intellisis Corporation
- Douglas A. PALMER
- G06 - COMPUTING CALCULATING COUNTING

Andrew Jonathan White

Person

Patents Grantslast 30 patents

Distributed contiguous reads in a network on a chip architecture

Writing to contiguous memory addresses in a network on a chip archi...

DMA engine for transferring data in a network-on-a-chip processor

Chained packet sequences in a network on a chip architecture

Synchronization in a multi-processor computing system

Performing write operations in a network on a chip device

Performing read operations in network on a chip architecture

Patents Applicationslast 30 patents

SECURE PAYMENT SYSTEMS AND METHODS

PERFORMING A SYNCHRONIZATION OPERATION ON AN ELECTRONIC DEVICE

Distributed Contiguous Reads in a Network on a Chip Architecture

Chained Packet Sequences in a Network on a Chip Architecture

Synchronization in a Multi-Processor Computing System

DETERMINING AN OPERATION STATE WITHIN A COMPUTING SYSTEM WITH MULTI...

SMART DMA ENGINE FOR A NETWORK-ON-A-CHIP PROCESSOR

Writing to Contiguous Memory Addresses in a Network on a Chip Archi...

REGISTER COMMUNICATION IN A NETWORK-ON-A-CHIP ARCHITECTURE

Performing Write Operations In A Network On A Chip Device

Performing Read Operations in Network on a Chip Architecture

Synchronization in a Computing System with Multi-Core Processing De...