Andrew S. Cassidy

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Defect resistant designs for location-sensitive neural network proc...
- Patent number 12,067,472
- Issue date Aug 20, 2024
- International Business Machines Corporation
- Rathinakumar Appuswamy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Runtime reconfigurable neural network processor core
- Patent number 12,056,598
- Issue date Aug 6, 2024
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel computational architecture with reconfigurable core-level...
- Patent number 11,847,553
- Issue date Dec 19, 2023
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction distribution in an array of neural network cores
- Patent number 11,663,461
- Issue date May 30, 2023
- International Business Machines Corporation
- Hartmut Penner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible precision neural inference processing unit
- Patent number 11,537,859
- Issue date Dec 27, 2022
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network weight distribution from a grid of memory elements
- Patent number 11,521,085
- Issue date Dec 6, 2022
- International Business Machines Corporation
- Jun Sawada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Runtime reconfigurable neural network processor core
- Patent number 11,501,140
- Issue date Nov 15, 2022
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware architecture for simulating a neural network of neurons
- Patent number 11,341,401
- Issue date May 24, 2022
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-mode low-precision inner-product computation circuits for mas...
- Patent number 11,270,196
- Issue date Mar 8, 2022
- International Business Machines Corporation
- Jun Sawada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compound instruction set architecture for a neural inference chip
- Patent number 11,263,011
- Issue date Mar 1, 2022
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data distribution in an array of neural network cores
- Patent number 11,238,347
- Issue date Feb 1, 2022
- International Business Machines Corporation
- Brian Taba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low energy deep-learning networks for generating auditory features...
- Patent number 11,205,419
- Issue date Dec 21, 2021
- International Business Machines Corporation
- Davis Barch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Yield tolerance in a neurosynaptic system
- Patent number 11,184,221
- Issue date Nov 23, 2021
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Streaming programmable point mapper and compute hardware
- Patent number 11,144,553
- Issue date Oct 12, 2021
- International Business Machines Corporation
- David J. Berg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Event-based neural network with hierarchical addressing for routing...
- Patent number 11,049,001
- Issue date Jun 29, 2021
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Massively parallel neural inference computing elements
- Patent number 11,010,662
- Issue date May 18, 2021
- International Business Machines Corporation
- Rathinakumar Appuswamy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Energy-efficient time-multiplexed neurosynaptic core for implementi...
- Patent number 10,990,872
- Issue date Apr 27, 2021
- International Business Machines Corporation
- Filipp A. Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Peripheral device interconnections for neurosynaptic systems
- Patent number 10,984,307
- Issue date Apr 20, 2021
- International Business Machines Corporation
- Filipp A. Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual deterministic and stochastic neurosynaptic core circuit
- Patent number 10,929,747
- Issue date Feb 23, 2021
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-mapped interface to message-passing computing systems
- Patent number 10,838,860
- Issue date Nov 17, 2020
- International Business Machines Corporation
- Filipp A. Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Globally asynchronous and locally synchronous (GALS) neuromorphic n...
- Patent number 10,839,287
- Issue date Nov 17, 2020
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective multicast delivery on a bus-based interconnect
- Patent number 10,834,024
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Simon J. Hollis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing error detection during deterministic program execution
- Patent number 10,831,595
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scaling multi-core neurosynaptic networks across chip boundaries
- Patent number 10,785,745
- Issue date Sep 22, 2020
- International Business Machines Corporation
- Rodrigo Alvarez Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Converting digital numeric data to spike event data
- Patent number 10,769,519
- Issue date Sep 8, 2020
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Converting spike event data to digital numeric data
- Patent number 10,755,165
- Issue date Aug 25, 2020
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect circuits at three-dimensional (3-D) bonding interfaces...
- Patent number 10,740,282
- Issue date Aug 11, 2020
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Short-term memory using neuromorphic hardware
- Patent number 10,733,500
- Issue date Aug 4, 2020
- International Business Machines Corporation
- Alexander Andreopoulos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplexing physical neurons to optimize power and area
- Patent number 10,713,561
- Issue date Jul 14, 2020
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Utilizing a distributed and parallel set of neurosynaptic core circ...
- Patent number 10,650,301
- Issue date May 12, 2020
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
RUNTIME RECONFIGURABLE NEURAL NETWORK PROCESSOR CORE
- Publication number 20230062217
- Publication date Mar 2, 2023
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AN EFFICIENT METHOD FOR VLSI IMPLEMENTATION OF USEFUL NEURAL NETWOR...
- Publication number 20220180177
- Publication date Jun 9, 2022
- International Business Machines Corporation
- Jun Sawada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYMBOLIC VALIDATION OF NEUROMORPHIC HARDWARE
- Publication number 20220129436
- Publication date Apr 28, 2022
- International Business Machines Corporation
- Alexander Andreopoulos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HORIZONTAL AND VERTICAL ASSERTIONS FOR VALIDATION OF NEUROMORPHIC H...
- Publication number 20220129742
- Publication date Apr 28, 2022
- International Business Machines Corporation
- Alexander Andreopoulos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR NEURAL NETWORK COMPUTING APPARATUS WITH DISTRIBUTED NEURAL...
- Publication number 20220129769
- Publication date Apr 28, 2022
- International Business Machines Corporation
- Jun Sawada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK ACCELERATOR OUTPUT RANKING
- Publication number 20220129743
- Publication date Apr 28, 2022
- International Business Machines Corporation
- Jun Sawada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFLICT-FREE, STALL-FREE, BROADCAST NETWORK ON CHIP
- Publication number 20220121951
- Publication date Apr 21, 2022
- International Business Machines Corporation
- Andrew Stephen Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHIPS SUPPORTING CONSTANT TIME PROGRAM CONTROL OF NESTED LOOPS
- Publication number 20220121925
- Publication date Apr 21, 2022
- International Business Machines Corporation
- Arnon Amir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-MAPPED NEURAL NETWORK ACCELERATOR FOR DEPLOYABLE INFERENCE S...
- Publication number 20220101108
- Publication date Mar 31, 2022
- International Business Machines Corporation
- Filipp Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK WEIGHT DISTRIBUTION FROM A GRID OF MEMORY ELEMENTS
- Publication number 20210312305
- Publication date Oct 7, 2021
- International Business Machines Corporation
- Jun Sawada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSED WEIGHT DISTRIBUTION IN NETWORKS OF NEURAL PROCESSORS
- Publication number 20210209450
- Publication date Jul 8, 2021
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE PRECISION NEURAL INFERENCE PROCESSING UNIT
- Publication number 20210174176
- Publication date Jun 10, 2021
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EVENT-BASED NEURAL NETWORK WITH HIERARCHICAL ADDRESSING FOR ROUTING...
- Publication number 20210166107
- Publication date Jun 3, 2021
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D NEURAL INFERENCE PROCESSING UNIT ARCHITECTURES
- Publication number 20210125040
- Publication date Apr 29, 2021
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-MODE LOW-PRECISION INNER-PRODUCT COMPUTATION CIRCUITS FOR MAS...
- Publication number 20210110245
- Publication date Apr 15, 2021
- International Business Machines Corporation
- Jun Sawada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMING ERROR DETECTION DURING DETERMINISTIC PROGRAM EXECUTION
- Publication number 20200379841
- Publication date Dec 3, 2020
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GLOBALLY ASYNCHRONOUS AND LOCALLY SYNCHRONOUS (GALS) NEUROMORPHIC N...
- Publication number 20200364535
- Publication date Nov 19, 2020
- International Business Machines Corporation
- Rodrigo Alvarez-Icaza Rivera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MASSIVELY PARALLEL NEURAL INFERENCE COMPUTING ELEMENTS
- Publication number 20200202205
- Publication date Jun 25, 2020
- International Business Machines Corporation
- Rathinakumar Appuswamy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPOUND INSTRUCTION SET ARCHITECTURE FOR A NEURAL INFERENCE CHIP
- Publication number 20200167158
- Publication date May 28, 2020
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORKS FOR DISTRIBUTING PARAMETERS AND DATA TO NEURAL NETWORK COM...
- Publication number 20200117988
- Publication date Apr 16, 2020
- International Business Machines Corporation
- John V. Arthur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-AGENT INSTRUCTION EXECUTION ENGINE FOR NEURAL INFERENCE PROCE...
- Publication number 20200117465
- Publication date Apr 16, 2020
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA REPRESENTATION FOR DYNAMIC PRECISION IN NEURAL NETWORK CORES
- Publication number 20200117981
- Publication date Apr 16, 2020
- International Business Machines Corporation
- John V. Arthur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE MULTICAST DELIVERY ON A BUS-BASED INTERCONNECT
- Publication number 20200106717
- Publication date Apr 2, 2020
- International Business Machines Corporation
- Simon J. Hollis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA DISTRIBUTION IN AN ARRAY OF NEURAL NETWORK CORES
- Publication number 20200104718
- Publication date Apr 2, 2020
- International Business Machines Corporation
- Brian Taba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW ENERGY DEEP-LEARNING NETWORKS FOR GENERATING AUDITORY FEATURES...
- Publication number 20200074989
- Publication date Mar 5, 2020
- International Business Machines Corporation
- Davis Barch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEDULER FOR MAPPING NEURAL NETWORKS ONTO AN ARRAY OF NEURAL CORES...
- Publication number 20200042856
- Publication date Feb 6, 2020
- International Business Machines Corporation
- Pallab Datta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL PARALLELISM IN A NETWORK OF DISTRIBUTED NEURAL NETWORK...
- Publication number 20200019836
- Publication date Jan 16, 2020
- International Business Machines Corporation
- John V. Arthur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION DISTRIBUTION IN AN ARRAY OF NEURAL NETWORK CORES
- Publication number 20200012929
- Publication date Jan 9, 2020
- International Business Machines Corporation
- Hartmut Penner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-MAPPED INTERFACE TO MESSAGE-PASSING COMPUTING SYSTEMS
- Publication number 20200004678
- Publication date Jan 2, 2020
- International Business Machines Corporation
- Filipp A. Akopyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RUNTIME RECONFIGURABLE NEURAL NETWORK PROCESSOR CORE
- Publication number 20190385048
- Publication date Dec 19, 2019
- International Business Machines Corporation
- Andrew S. Cassidy
- G06 - COMPUTING CALCULATING COUNTING

Andrew S. Cassidy

Person

Patents Grantslast 30 patents

Defect resistant designs for location-sensitive neural network proc...

Runtime reconfigurable neural network processor core

Parallel computational architecture with reconfigurable core-level...

Instruction distribution in an array of neural network cores

Flexible precision neural inference processing unit

Neural network weight distribution from a grid of memory elements

Runtime reconfigurable neural network processor core

Hardware architecture for simulating a neural network of neurons

Multi-mode low-precision inner-product computation circuits for mas...

Compound instruction set architecture for a neural inference chip

Data distribution in an array of neural network cores

Low energy deep-learning networks for generating auditory features...

Yield tolerance in a neurosynaptic system

Streaming programmable point mapper and compute hardware

Event-based neural network with hierarchical addressing for routing...

Massively parallel neural inference computing elements

Energy-efficient time-multiplexed neurosynaptic core for implementi...

Peripheral device interconnections for neurosynaptic systems

Dual deterministic and stochastic neurosynaptic core circuit

Memory-mapped interface to message-passing computing systems

Globally asynchronous and locally synchronous (GALS) neuromorphic n...

Selective multicast delivery on a bus-based interconnect

Performing error detection during deterministic program execution

Scaling multi-core neurosynaptic networks across chip boundaries

Converting digital numeric data to spike event data

Converting spike event data to digital numeric data

Interconnect circuits at three-dimensional (3-D) bonding interfaces...

Short-term memory using neuromorphic hardware

Multiplexing physical neurons to optimize power and area

Utilizing a distributed and parallel set of neurosynaptic core circ...

Patents Applicationslast 30 patents

RUNTIME RECONFIGURABLE NEURAL NETWORK PROCESSOR CORE

AN EFFICIENT METHOD FOR VLSI IMPLEMENTATION OF USEFUL NEURAL NETWOR...

SYMBOLIC VALIDATION OF NEUROMORPHIC HARDWARE

HORIZONTAL AND VERTICAL ASSERTIONS FOR VALIDATION OF NEUROMORPHIC H...

MODULAR NEURAL NETWORK COMPUTING APPARATUS WITH DISTRIBUTED NEURAL...

NEURAL NETWORK ACCELERATOR OUTPUT RANKING

CONFLICT-FREE, STALL-FREE, BROADCAST NETWORK ON CHIP

CHIPS SUPPORTING CONSTANT TIME PROGRAM CONTROL OF NESTED LOOPS

MEMORY-MAPPED NEURAL NETWORK ACCELERATOR FOR DEPLOYABLE INFERENCE S...

NEURAL NETWORK WEIGHT DISTRIBUTION FROM A GRID OF MEMORY ELEMENTS

COMPRESSED WEIGHT DISTRIBUTION IN NETWORKS OF NEURAL PROCESSORS

FLEXIBLE PRECISION NEURAL INFERENCE PROCESSING UNIT

EVENT-BASED NEURAL NETWORK WITH HIERARCHICAL ADDRESSING FOR ROUTING...

3D NEURAL INFERENCE PROCESSING UNIT ARCHITECTURES

MULTI-MODE LOW-PRECISION INNER-PRODUCT COMPUTATION CIRCUITS FOR MAS...

PERFORMING ERROR DETECTION DURING DETERMINISTIC PROGRAM EXECUTION

GLOBALLY ASYNCHRONOUS AND LOCALLY SYNCHRONOUS (GALS) NEUROMORPHIC N...

MASSIVELY PARALLEL NEURAL INFERENCE COMPUTING ELEMENTS

COMPOUND INSTRUCTION SET ARCHITECTURE FOR A NEURAL INFERENCE CHIP

NETWORKS FOR DISTRIBUTING PARAMETERS AND DATA TO NEURAL NETWORK COM...

MULTI-AGENT INSTRUCTION EXECUTION ENGINE FOR NEURAL INFERENCE PROCE...

DATA REPRESENTATION FOR DYNAMIC PRECISION IN NEURAL NETWORK CORES

SELECTIVE MULTICAST DELIVERY ON A BUS-BASED INTERCONNECT

DATA DISTRIBUTION IN AN ARRAY OF NEURAL NETWORK CORES

LOW ENERGY DEEP-LEARNING NETWORKS FOR GENERATING AUDITORY FEATURES...

SCHEDULER FOR MAPPING NEURAL NETWORKS ONTO AN ARRAY OF NEURAL CORES...

HIERARCHICAL PARALLELISM IN A NETWORK OF DISTRIBUTED NEURAL NETWORK...

INSTRUCTION DISTRIBUTION IN AN ARRAY OF NEURAL NETWORK CORES

MEMORY-MAPPED INTERFACE TO MESSAGE-PASSING COMPUTING SYSTEMS

RUNTIME RECONFIGURABLE NEURAL NETWORK PROCESSOR CORE