Andrew V. Kearney

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Santa Clara, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method of fabricating a semiconductor package with integrated subst...
- Patent number 8,623,707
- Issue date Jan 7, 2014
- Cisco Technology, Inc.
- Andrew V. Kearney
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with integrated substrate thermal slug
- Patent number 8,405,203
- Issue date Mar 26, 2013
- Cisco Technology, Inc.
- Andrew V. Kearney
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR PACKAGE WITH INTEGRATED SUBSTRATE THERMAL SLUG
- Publication number 20130210196
- Publication date Aug 15, 2013
- Cisco Technology, Inc.
- Andrew V. Kearney
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH INTEGRATED SUBSTRATE THERMAL SLUG
- Publication number 20120063096
- Publication date Mar 15, 2012
- Andrew V. Kearney
- H01 - BASIC ELECTRIC ELEMENTS