Andrew Waterman

Person

Berkeley, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Load-store pipeline selection for vectors
- Patent number 12,086,067
- Issue date Sep 10, 2024
- SiFive, Inc.
- Andrew Waterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Macro-op fusion
- Patent number 11,861,365
- Issue date Jan 2, 2024
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fetch stage handling of indirect jumps in a processor pipeline
- Patent number 11,797,308
- Issue date Oct 24, 2023
- SiFive, Inc.
- Joshua Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Way predictor and enable logic for instruction tightly-coupled memo...
- Patent number 11,687,342
- Issue date Jun 27, 2023
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure predictors for speculative execution
- Patent number 11,429,392
- Issue date Aug 30, 2022
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fetch stage handling of indirect jumps in a processor pipeline
- Patent number 11,301,251
- Issue date Apr 12, 2022
- SiFive, Inc.
- Joshua Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Way predictor and enable logic for instruction tightly-coupled memo...
- Patent number 11,048,515
- Issue date Jun 29, 2021
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Macro-op fusion
- Patent number 10,996,952
- Issue date May 4, 2021
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
QUAD NARROWING OPERATION
- Publication number 20240329928
- Publication date Oct 3, 2024
- SiFive, Inc.
- Andrew Waterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Macro-Op Fusion for Pipelined Architectures
- Publication number 20240264839
- Publication date Aug 8, 2024
- SiFive, Inc.
- Andrew Waterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC MEMORY OPERATIONS FOR ADDRESS TRANSLATION
- Publication number 20240104024
- Publication date Mar 28, 2024
- SiFive, Inc.
- John Ingalls
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Supporting Multiple Vector Lengths with Configurable Vector Registe...
- Publication number 20240020124
- Publication date Jan 18, 2024
- SiFive, Inc.
- Andrew Waterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fusion with Destructive Instructions
- Publication number 20240020126
- Publication date Jan 18, 2024
- SiFive, Inc.
- Andrew Waterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Request Combination Indication
- Publication number 20240020012
- Publication date Jan 18, 2024
- SiFive, Inc.
- Eric Andrew Gouldey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT PROCESSING OF MASKED MEMORY ACCESSES
- Publication number 20240012948
- Publication date Jan 11, 2024
- SiFive, Inc.
- Andrew Waterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vector Gather with a Narrow Datapath
- Publication number 20230367599
- Publication date Nov 16, 2023
- SiFive, Inc.
- Andrew Waterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Load-Store Pipeline Selection For Vectors
- Publication number 20230367715
- Publication date Nov 16, 2023
- SiFive, Inc.
- Andrew Waterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY PROTECTION FOR VECTOR OPERATIONS
- Publication number 20230315649
- Publication date Oct 5, 2023
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY PROTECTION FOR GATHER-SCATTER OPERATIONS
- Publication number 20230305969
- Publication date Sep 28, 2023
- SiFive, Inc.
- Andrew Waterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER RENAMING FOR POWER CONSERVATION
- Publication number 20230305852
- Publication date Sep 28, 2023
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Logging Guest Physical Address for Memory Access Faults
- Publication number 20230195647
- Publication date Jun 22, 2023
- SiFive, Inc.
- John Ingalls
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor Power Management Using Instruction Throttling
- Publication number 20230019271
- Publication date Jan 19, 2023
- SiFive, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FETCH STAGE HANDLING OF INDIRECT JUMPS IN A PROCESSOR PIPELINE
- Publication number 20220236993
- Publication date Jul 28, 2022
- SiFive, Inc.
- Joshua Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WAY PREDICTOR AND ENABLE LOGIC FOR INSTRUCTION TIGHTLY-COUPLED MEMO...
- Publication number 20220083340
- Publication date Mar 17, 2022
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FETCH STAGE HANDLING OF INDIRECT JUMPS IN A PROCESSOR PIPELINE
- Publication number 20210303300
- Publication date Sep 30, 2021
- SiFive, Inc.
- Joshua Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MACRO-OP FUSION
- Publication number 20210255859
- Publication date Aug 19, 2021
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION TIGHTLY-COUPLED MEMORY AND INSTRUCTION CACHE ACCESS PRE...
- Publication number 20200210189
- Publication date Jul 2, 2020
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE PREDICTORS FOR SPECULATIVE EXECUTION
- Publication number 20200210197
- Publication date Jul 2, 2020
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MACRO-OP FUSION
- Publication number 20200183687
- Publication date Jun 11, 2020
- SiFive, Inc.
- Krste Asanovic
- G06 - COMPUTING CALCULATING COUNTING

Andrew Waterman

Person

Patents Grantslast 30 patents

Load-store pipeline selection for vectors

Macro-op fusion

Fetch stage handling of indirect jumps in a processor pipeline

Way predictor and enable logic for instruction tightly-coupled memo...

Secure predictors for speculative execution

Fetch stage handling of indirect jumps in a processor pipeline

Way predictor and enable logic for instruction tightly-coupled memo...

Macro-op fusion

Patents Applicationslast 30 patents

QUAD NARROWING OPERATION

Macro-Op Fusion for Pipelined Architectures

ATOMIC MEMORY OPERATIONS FOR ADDRESS TRANSLATION

Supporting Multiple Vector Lengths with Configurable Vector Registe...

Fusion with Destructive Instructions

Memory Request Combination Indication

EFFICIENT PROCESSING OF MASKED MEMORY ACCESSES

Vector Gather with a Narrow Datapath

Load-Store Pipeline Selection For Vectors

MEMORY PROTECTION FOR VECTOR OPERATIONS

MEMORY PROTECTION FOR GATHER-SCATTER OPERATIONS

REGISTER RENAMING FOR POWER CONSERVATION

Logging Guest Physical Address for Memory Access Faults

Processor Power Management Using Instruction Throttling

FETCH STAGE HANDLING OF INDIRECT JUMPS IN A PROCESSOR PIPELINE

WAY PREDICTOR AND ENABLE LOGIC FOR INSTRUCTION TIGHTLY-COUPLED MEMO...

FETCH STAGE HANDLING OF INDIRECT JUMPS IN A PROCESSOR PIPELINE

MACRO-OP FUSION

INSTRUCTION TIGHTLY-COUPLED MEMORY AND INSTRUCTION CACHE ACCESS PRE...

SECURE PREDICTORS FOR SPECULATIVE EXECUTION

MACRO-OP FUSION