Andy Cowley

Person

Wappingers Falls, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method for prediction of premature dielectric breakdown in a semico...
- Patent number 8,053,257
- Issue date Nov 8, 2011
- International Business Machines Corporation
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Grant
Via bottom contact and method of manufacturing same
- Patent number 7,830,019
- Issue date Nov 9, 2010
- International Business Machines Corporation
- Kaushik Chanda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus of stress relief in semiconductor structures
- Patent number 7,786,007
- Issue date Aug 31, 2010
- Infineon Technologies AG
- Mark Hoinkis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure for modeling stress-induced degradation of conductive int...
- Patent number 7,692,439
- Issue date Apr 6, 2010
- International Business Machines Corporation
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Grant
Structure for monitoring stress-induced degradation of conductive i...
- Patent number 7,639,032
- Issue date Dec 29, 2009
- International Business Machines Corporation
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Grant
Interconnect structure
- Patent number 7,598,616
- Issue date Oct 6, 2009
- International Business Machines Corporation
- Chih-Chao Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
VIA bottom contact and method of manufacturing same
- Patent number 7,585,764
- Issue date Sep 8, 2009
- International Business Machines Corporation
- Kaushik Chanda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabrication of interconnect structures
- Patent number 7,563,710
- Issue date Jul 21, 2009
- International Business Machines Corporation
- Chih-Chao Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structure and method of fabrication of same
- Patent number 7,528,493
- Issue date May 5, 2009
- International Business Machines Corporation
- Chih-Chao Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back end interconnect with a shaped interface
- Patent number 7,494,915
- Issue date Feb 24, 2009
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for monitoring stress-induced degradation of c...
- Patent number 7,397,260
- Issue date Jul 8, 2008
- International Business Machines Corporation
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus of stress relief in semiconductor structures
- Patent number 7,368,804
- Issue date May 6, 2008
- Infineon Technologies AG
- Mark Hoinkis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structure and method of fabrication of same
- Patent number 7,335,588
- Issue date Feb 26, 2008
- International Business Machines Corporation
- Chih-Chao Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bilayered metal hardmasks for use in dual damascene etch schemes
- Patent number 7,241,681
- Issue date Jul 10, 2007
- Infineon Technologies AG
- Kaushik Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene structure and method
- Patent number 7,125,792
- Issue date Oct 24, 2006
- Infineon Technologies AG
- Kaushik Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back end interconnect with a shaped interface
- Patent number 7,122,462
- Issue date Oct 17, 2006
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene structure and method
- Patent number 7,091,612
- Issue date Aug 15, 2006
- Infineon Technologies AG
- Kaushik Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduction of the shear stress in copper via's in organic interlayer...
- Patent number 7,060,619
- Issue date Jun 13, 2006
- Infineon Technologies AG
- Andy Cowley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bilayered metal hardmasks for use in Dual Damascene etch schemes
- Patent number 7,052,621
- Issue date May 30, 2006
- Infineon Technologies AG
- Kaushik Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Composite intermetal dielectric structure including low-k dielectri...
- Patent number 7,041,574
- Issue date May 9, 2006
- Infineon Technologies AG
- Sun-Oo Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Crystallographic modification of hard mask properties
- Patent number 7,001,835
- Issue date Feb 21, 2006
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduced splattering of unpassivated laser fuses
- Patent number 6,872,648
- Issue date Mar 29, 2005
- Infineon Technologies AG
- Gerald R. Friese
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via density rules
- Patent number 6,864,171
- Issue date Mar 8, 2005
- Infineon Technologies AG
- Mark D. Hoinkis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Robust via structure and method
- Patent number 6,806,579
- Issue date Oct 19, 2004
- Infineon Technologies AG
- Andy Cowley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simultaneous native oxide removal and metal neutral deposition method
- Patent number 6,784,105
- Issue date Aug 31, 2004
- Infineon Technologies North America Corp.
- Chih-Chao Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plasma RIE polymer removal
- Patent number 6,758,223
- Issue date Jul 6, 2004
- Infineon Technologies AG
- Andy Cowley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual hardmask single damascene integration scheme in an organic low...
- Patent number 6,638,851
- Issue date Oct 28, 2003
- Infineon Technologies North America Corp.
- Andy Cowley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming an on-chip decoupling capacitor with bottom hardmask
- Patent number 6,387,754
- Issue date May 14, 2002
- International Business Machines Corporation
- Timothy J. Dalton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
On-chip decoupling capacitor with bottom hardmask
- Patent number 6,278,147
- Issue date Aug 21, 2001
- International Business Machines Corporation
- Timothy J. Dalton
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
VIA BOTTOM CONTACT AND METHOD OF MANUFACTURING SAME
- Publication number 20090200673
- Publication date Aug 13, 2009
- International Business Machines Corporation
- Kaushik Chanda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT STRUCTURE AND METHOD OF FABRICATION OF SAME
- Publication number 20080246151
- Publication date Oct 9, 2008
- Chih-Chao Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure for modeling stress-induced degradation of conductive int...
- Publication number 20080231312
- Publication date Sep 25, 2008
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus of Stress Relief in Semiconductor Structures
- Publication number 20080213993
- Publication date Sep 4, 2008
- Mark Hoinkis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PREDICTION OF PREMATURE DIELECTRIC BREAKDOWN IN A SEMICO...
- Publication number 20080174334
- Publication date Jul 24, 2008
- International Business Machines Corporation
- Kaushik Chanda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for monitoring stress-induced degradation of conductive inte...
- Publication number 20080107149
- Publication date May 8, 2008
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Application
INTERCONNECT STRUCTURE AND METHOD OF FABRICATION OF SAME
- Publication number 20080014744
- Publication date Jan 17, 2008
- Chih-Chao Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT STRUCTURE AND METHOD OF FABRICATION OF SAME
- Publication number 20080006944
- Publication date Jan 10, 2008
- Chih-Chao Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD FOR MONITORING STRESS-INDUCED DEGRADATION OF C...
- Publication number 20070115018
- Publication date May 24, 2007
- International Business Machines Corporation
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Application
Post-etch removal of fluorocarbon-based residues from a hybrid diel...
- Publication number 20070059922
- Publication date Mar 15, 2007
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA BOTTOM CONTACT AND METHOD OF MANUFACTURING SAME
- Publication number 20070037403
- Publication date Feb 15, 2007
- International Business Machines Corporation
- Kaushik Chanda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACK END INTERCONNECT WITH A SHAPED INTERFACE
- Publication number 20060292852
- Publication date Dec 28, 2006
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PREDICTION OF PREMATURE DIELECTRIC BREAKDOWN IN A SEMICO...
- Publication number 20060281338
- Publication date Dec 14, 2006
- International Business Machines Corporation
- Kaushik Chanda
- G01 - MEASURING TESTING
Information Patent Application
Interconnect structure and method of fabrication of same
- Publication number 20060234497
- Publication date Oct 19, 2006
- Chih-Chao Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bilayered metal hardmasks for use in dual damascene etch schemes
- Publication number 20060113278
- Publication date Jun 1, 2006
- Kaushik Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus of stress relief in semiconductor structures
- Publication number 20050221610
- Publication date Oct 6, 2005
- Mark Hoinkis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OXIDIZED TANTALUM NITRIDE AS AN IMPROVED HARDMASK IN DUAL-DAMASCENE...
- Publication number 20050208742
- Publication date Sep 22, 2005
- International Business Machines Corporation
- William G. America
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Crystallographic Modification of Hard mask Properties
- Publication number 20050112862
- Publication date May 26, 2005
- International Business Machines Corporation
- Lawrence A. Clevenger
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Back End Interconnect With a Shaped Interface
- Publication number 20050112864
- Publication date May 26, 2005
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual damascene structure and method
- Publication number 20050079706
- Publication date Apr 14, 2005
- Kaushik Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual damascene structure and method
- Publication number 20050077628
- Publication date Apr 14, 2005
- Kaushik Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Composite intermetal dielectric structure including low-k dielectri...
- Publication number 20040259273
- Publication date Dec 23, 2004
- Sun-Oo Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bilayered metal hardmasks for use in dual damascene etch schemes
- Publication number 20040251234
- Publication date Dec 16, 2004
- Kaushik Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Composite low-k dielectric structure
- Publication number 20040248400
- Publication date Dec 9, 2004
- Sun-Oo Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus of stress relief in semiconductor structures
- Publication number 20040227214
- Publication date Nov 18, 2004
- Mark Hoinkis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reduction of the shear stress in copper via's in organic interlayer...
- Publication number 20040175921
- Publication date Sep 9, 2004
- Infineon Technologies North America Corp.
- Andy Cowley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ROBUST VIA STRUCTURE AND METHOD
- Publication number 20040157442
- Publication date Aug 12, 2004
- Andy Cowley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Via liner integration to avoid resistance shift and resist mechanic...
- Publication number 20040058526
- Publication date Mar 25, 2004
- Infineon Technologies North America Corp.
- Andrew Cowley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reduced splattering of unpassivated laser fuses
- Publication number 20040056322
- Publication date Mar 25, 2004
- Gerald R. Friese
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Elimination of via-resistance-shift by increasing via size at a las...
- Publication number 20030042580
- Publication date Mar 6, 2003
- Mark Hoinkis
- H01 - BASIC ELECTRIC ELEMENTS

Andy Cowley

Person

Patents Grantslast 30 patents

Method for prediction of premature dielectric breakdown in a semico...

Via bottom contact and method of manufacturing same

Method and apparatus of stress relief in semiconductor structures

Structure for modeling stress-induced degradation of conductive int...

Structure for monitoring stress-induced degradation of conductive i...

Interconnect structure

VIA bottom contact and method of manufacturing same

Method of fabrication of interconnect structures

Interconnect structure and method of fabrication of same

Back end interconnect with a shaped interface

Structure and method for monitoring stress-induced degradation of c...

Method and apparatus of stress relief in semiconductor structures

Interconnect structure and method of fabrication of same

Bilayered metal hardmasks for use in dual damascene etch schemes

Dual damascene structure and method

Back end interconnect with a shaped interface

Dual damascene structure and method

Reduction of the shear stress in copper via's in organic interlayer...

Bilayered metal hardmasks for use in Dual Damascene etch schemes

Composite intermetal dielectric structure including low-k dielectri...

Crystallographic modification of hard mask properties

Reduced splattering of unpassivated laser fuses

Via density rules

Robust via structure and method

Simultaneous native oxide removal and metal neutral deposition method

Plasma RIE polymer removal

Dual hardmask single damascene integration scheme in an organic low...

Method of forming an on-chip decoupling capacitor with bottom hardmask

On-chip decoupling capacitor with bottom hardmask

Patents Applicationslast 30 patents

VIA BOTTOM CONTACT AND METHOD OF MANUFACTURING SAME

INTERCONNECT STRUCTURE AND METHOD OF FABRICATION OF SAME

Structure for modeling stress-induced degradation of conductive int...

Method and Apparatus of Stress Relief in Semiconductor Structures

METHOD FOR PREDICTION OF PREMATURE DIELECTRIC BREAKDOWN IN A SEMICO...

Method for monitoring stress-induced degradation of conductive inte...

INTERCONNECT STRUCTURE AND METHOD OF FABRICATION OF SAME

INTERCONNECT STRUCTURE AND METHOD OF FABRICATION OF SAME

STRUCTURE AND METHOD FOR MONITORING STRESS-INDUCED DEGRADATION OF C...

Post-etch removal of fluorocarbon-based residues from a hybrid diel...

VIA BOTTOM CONTACT AND METHOD OF MANUFACTURING SAME

BACK END INTERCONNECT WITH A SHAPED INTERFACE

METHOD FOR PREDICTION OF PREMATURE DIELECTRIC BREAKDOWN IN A SEMICO...

Interconnect structure and method of fabrication of same

Bilayered metal hardmasks for use in dual damascene etch schemes

Method and apparatus of stress relief in semiconductor structures

OXIDIZED TANTALUM NITRIDE AS AN IMPROVED HARDMASK IN DUAL-DAMASCENE...

Crystallographic Modification of Hard mask Properties

Back End Interconnect With a Shaped Interface

Dual damascene structure and method

Dual damascene structure and method

Composite intermetal dielectric structure including low-k dielectri...

Bilayered metal hardmasks for use in dual damascene etch schemes

Composite low-k dielectric structure

Method and apparatus of stress relief in semiconductor structures

Reduction of the shear stress in copper via's in organic interlayer...

ROBUST VIA STRUCTURE AND METHOD

Via liner integration to avoid resistance shift and resist mechanic...

Reduced splattering of unpassivated laser fuses

Elimination of via-resistance-shift by increasing via size at a las...