Andy Lee

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Trace-based survey for pull request workflow
- Patent number 12,333,301
- Issue date Jun 17, 2025
- GM Cruise Holdings, LLC
- Stephen James Day
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and circuitry for programming non-volatile resistive switch...
- Patent number 10,573,375
- Issue date Feb 25, 2020
- Intel Corporation
- Yue-Song He
- G11 - INFORMATION STORAGE
Information Patent Grant
Manufacture of interconnects for integration of multiple integrated...
- Patent number 10,541,205
- Issue date Jan 21, 2020
- Intel Corporation
- Ning Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with programmable non-volatile resistive switch...
- Patent number 10,447,275
- Issue date Oct 15, 2019
- Intel Corporation
- Andy L. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuits with complementary non-volatile resistive memor...
- Patent number 10,269,426
- Issue date Apr 23, 2019
- Intel Corporation
- Richard G. Smolen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Omnibus logic element
- Patent number 10,177,766
- Issue date Jan 8, 2019
- Altera Corporation
- James Schleicher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with overdriven and underdriven pass gates
- Patent number 10,121,534
- Issue date Nov 6, 2018
- Altera Corporation
- Andy L. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with programmable non-volatile resistive switch...
- Patent number 10,090,840
- Issue date Oct 2, 2018
- Intel Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
N-well/P-well strap structures
- Patent number 10,043,716
- Issue date Aug 7, 2018
- Altera Corporation
- Dustin Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable integrated circuits with in-operation reconfiguration...
- Patent number 9,984,734
- Issue date May 29, 2018
- Altera Corporation
- Andy L. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for handling high voltage circuitry in an integrated cir...
- Patent number 9,755,647
- Issue date Sep 5, 2017
- Altera Corporation
- Andy Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable repeater circuits and methods
- Patent number 9,667,314
- Issue date May 30, 2017
- Altera Corporation
- Shuxian Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Structures for LUT-based arithmetic in PLDs
- Patent number 9,658,830
- Issue date May 23, 2017
- Altera Corporation
- Ketan Padalia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hardened programmable devices
- Patent number 9,654,109
- Issue date May 16, 2017
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable integrated circuits with in-operation reconfiguration...
- Patent number 9,607,671
- Issue date Mar 28, 2017
- Altera Corporation
- Andy L. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Scaleable look-up table based memory
- Patent number 9,548,103
- Issue date Jan 17, 2017
- Altera Corporation
- Philip Pan
- G11 - INFORMATION STORAGE
Information Patent Grant
First-in-first-out memory with dual memory banks
- Patent number 9,501,407
- Issue date Nov 22, 2016
- Altera Corporation
- Ray Ruey-Hsien Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Omnibus logic element
- Patent number 9,496,875
- Issue date Nov 15, 2016
- Altera Corporation
- James Schleicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuits with asymmetric and stacked transistors
- Patent number 9,496,268
- Issue date Nov 15, 2016
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
N-well/P-well strap structures
- Patent number 9,449,962
- Issue date Sep 20, 2016
- Altera Corporation
- Dustin Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory elements with soft error upset immunity
- Patent number 9,412,436
- Issue date Aug 9, 2016
- Altera Corporation
- Irfan Rahim
- G11 - INFORMATION STORAGE
Information Patent Grant
Power and die size optimization in FinFETs
- Patent number 9,397,095
- Issue date Jul 19, 2016
- Altera Corporation
- Ning Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable integrated circuits with in-operation reconfiguration...
- Patent number 9,299,396
- Issue date Mar 29, 2016
- Altera Corporation
- Andy L. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple data rate memory interface architecture
- Patent number 9,224,438
- Issue date Dec 29, 2015
- Altera Corporation
- Andy L. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for field-programmable gate array with configurable archi...
- Patent number 9,165,931
- Issue date Oct 20, 2015
- Altera Corporation
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scaleable look-up table based memory
- Patent number 9,123,437
- Issue date Sep 1, 2015
- Altera Corporation
- Philip Pan
- G11 - INFORMATION STORAGE
Information Patent Grant
Metal routing in advanced process technologies
- Patent number 9,099,531
- Issue date Aug 4, 2015
- Altera Corporation
- Ning Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PLD architecture for flexible placement of IP function blocks
- Patent number 9,094,014
- Issue date Jul 28, 2015
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory circuit with PMOS access transistors
- Patent number 8,995,175
- Issue date Mar 31, 2015
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Omnibus logic element
- Patent number 8,878,567
- Issue date Nov 4, 2014
- Altera Corporation
- James Schleicher
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
TRACE-BASED SURVEY FOR PULL REQUEST WORKFLOW
- Publication number 20240296044
- Publication date Sep 5, 2024
- GM Cruise Holdings LLC
- Stephen James Day
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Asymmetrical Memory Circuits And Methods
- Publication number 20230410897
- Publication date Dec 21, 2023
- Intel Corporation
- David Parkhouse
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for Low Power Modes for Programmable Logic Devices
- Publication number 20220123753
- Publication date Apr 21, 2022
- Intel Corporation
- Ping-Chen Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS AND CIRCUITRY FOR PROGRAMMING NON-VOLATILE RESISTIVE SWITCH...
- Publication number 20200075088
- Publication date Mar 5, 2020
- Intel Corporation
- Yue-Song He
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUITS WITH PROGRAMMABLE NON-VOLATILE RESISTIVE SWITCH...
- Publication number 20190020344
- Publication date Jan 17, 2019
- Intel Corporation
- Andy L. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUITS WITH COMPLEMENTARY NON-VOLATILE RESISTIVE MEMOR...
- Publication number 20180366192
- Publication date Dec 20, 2018
- Intel Corporation
- Richard G. Smolen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Techniques For Handling High Voltage Circuitry In An Integrated Cir...
- Publication number 20180109262
- Publication date Apr 19, 2018
- Altera Corporation
- Andy Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
STRUCTURES FOR LUT-BASED ARITHMETIC IN PLDS
- Publication number 20170322775
- Publication date Nov 9, 2017
- Altera Corporation
- Ketan Padalia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE INTEGRATED CIRCUITS WITH IN-OPERATION RECONFIGURATION...
- Publication number 20170200484
- Publication date Jul 13, 2017
- Altera Corporation
- Andy L. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE COMPONENT BASED APPLICATION
- Publication number 20170019499
- Publication date Jan 19, 2017
- SugarCRM Inc.
- Robert Gonzalez
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
N-WELL/P-WELL STRAP STRUCTURES
- Publication number 20160358825
- Publication date Dec 8, 2016
- Altera Corporation
- Dustin Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuits with Asymmetric and Stacked Transistors
- Publication number 20160232952
- Publication date Aug 11, 2016
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuits with Asymmetric and Stacked Transistors
- Publication number 20150318029
- Publication date Nov 5, 2015
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHODS FOR POWER MANAGEMENT IN INTEGRATED CIRCUITS
- Publication number 20140258956
- Publication date Sep 11, 2014
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDENED PROGRAMMABLE DEVICES
- Publication number 20140218068
- Publication date Aug 7, 2014
- Altera Corporation
- Andy L. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS
- Publication number 20140210515
- Publication date Jul 31, 2014
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTIPLE DATA RATE MEMORY INTERFACE ARCHITECTURE
- Publication number 20140003115
- Publication date Jan 2, 2014
- Andy L. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS
- Publication number 20130214815
- Publication date Aug 22, 2013
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
N-WELL/P-WELL STRAP STRUCTURES
- Publication number 20130140640
- Publication date Jun 6, 2013
- Altera Corporation
- Dustin Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS FOR IMPROVING PERFORMANCE OF FIELD PROGRAMMABLE GATE ARRA...
- Publication number 20130043902
- Publication date Feb 21, 2013
- Irfan Rahim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
N-Well/P-Well Strap Structures
- Publication number 20120261738
- Publication date Oct 18, 2012
- Dustin Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS
- Publication number 20120217998
- Publication date Aug 30, 2012
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HARDENED PROGRAMMABLE DEVICES
- Publication number 20120098569
- Publication date Apr 26, 2012
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and Methods for Optimizing the Performance of Programmabl...
- Publication number 20120089958
- Publication date Apr 12, 2012
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALEABLE LOOK-UP TABLE BASED MEMORY
- Publication number 20120039142
- Publication date Feb 16, 2012
- Philip Pan
- G11 - INFORMATION STORAGE
Information Patent Application
N-WELL/P-WELL STRAP STRUCTURES
- Publication number 20120032276
- Publication date Feb 9, 2012
- Altera Corporation
- Dustin Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HARDENED PROGRAMMABLE DEVICES
- Publication number 20120032702
- Publication date Feb 9, 2012
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTIPLE DATA RATE MEMORY INTERFACE ARCHITECTURE
- Publication number 20110260751
- Publication date Oct 27, 2011
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and methods for adjusting performance of programmable log...
- Publication number 20110204919
- Publication date Aug 25, 2011
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR DETECTION ON PROGRAMMABLE LOGIC RESOURCES
- Publication number 20110138240
- Publication date Jun 9, 2011
- Altera Corporation
- Ninh D. Ngo
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Trace-based survey for pull request workflow

Methods and circuitry for programming non-volatile resistive switch...

Manufacture of interconnects for integration of multiple integrated...

Integrated circuits with programmable non-volatile resistive switch...

Integrated circuits with complementary non-volatile resistive memor...

Omnibus logic element

Integrated circuit with overdriven and underdriven pass gates

Integrated circuits with programmable non-volatile resistive switch...

N-well/P-well strap structures

Programmable integrated circuits with in-operation reconfiguration...

Techniques for handling high voltage circuitry in an integrated cir...

Programmable repeater circuits and methods

Structures for LUT-based arithmetic in PLDs

Hardened programmable devices

Programmable integrated circuits with in-operation reconfiguration...

Scaleable look-up table based memory

First-in-first-out memory with dual memory banks

Omnibus logic element

Integrated circuits with asymmetric and stacked transistors

N-well/P-well strap structures

Memory elements with soft error upset immunity

Power and die size optimization in FinFETs

Programmable integrated circuits with in-operation reconfiguration...

Multiple data rate memory interface architecture

Apparatus for field-programmable gate array with configurable archi...

Scaleable look-up table based memory

Metal routing in advanced process technologies

PLD architecture for flexible placement of IP function blocks

Memory circuit with PMOS access transistors

Omnibus logic element

Patents Applicationslast 30 patents

TRACE-BASED SURVEY FOR PULL REQUEST WORKFLOW

Asymmetrical Memory Circuits And Methods

Systems and Methods for Low Power Modes for Programmable Logic Devices

METHODS AND CIRCUITRY FOR PROGRAMMING NON-VOLATILE RESISTIVE SWITCH...

INTEGRATED CIRCUITS WITH PROGRAMMABLE NON-VOLATILE RESISTIVE SWITCH...

INTEGRATED CIRCUITS WITH COMPLEMENTARY NON-VOLATILE RESISTIVE MEMOR...

Techniques For Handling High Voltage Circuitry In An Integrated Cir...

STRUCTURES FOR LUT-BASED ARITHMETIC IN PLDS

PROGRAMMABLE INTEGRATED CIRCUITS WITH IN-OPERATION RECONFIGURATION...

ADAPTIVE COMPONENT BASED APPLICATION

N-WELL/P-WELL STRAP STRUCTURES

Integrated Circuits with Asymmetric and Stacked Transistors

Integrated Circuits with Asymmetric and Stacked Transistors

APPARATUS AND METHODS FOR POWER MANAGEMENT IN INTEGRATED CIRCUITS

HARDENED PROGRAMMABLE DEVICES

PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS

MULTIPLE DATA RATE MEMORY INTERFACE ARCHITECTURE

PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS

N-WELL/P-WELL STRAP STRUCTURES

APPARATUS FOR IMPROVING PERFORMANCE OF FIELD PROGRAMMABLE GATE ARRA...

N-Well/P-Well Strap Structures

PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS

HARDENED PROGRAMMABLE DEVICES

Apparatus and Methods for Optimizing the Performance of Programmabl...

SCALEABLE LOOK-UP TABLE BASED MEMORY

N-WELL/P-WELL STRAP STRUCTURES

HARDENED PROGRAMMABLE DEVICES

MULTIPLE DATA RATE MEMORY INTERFACE ARCHITECTURE

Apparatus and methods for adjusting performance of programmable log...

ERROR DETECTION ON PROGRAMMABLE LOGIC RESOURCES