Anil Gupta

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
NAND flash memory having an enhanced buffer read capability and met...
- Patent number 9,442,798
- Issue date Sep 13, 2016
- Winbond Electronics Corporation
- Oron Michael
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND flash memory array architecture having low read latency and lo...
- Patent number 9,245,639
- Issue date Jan 26, 2016
- Windbound Electronics Corporation
- Jong Oh Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
On-chip bad block management for NAND flash memory
- Patent number 9,128,822
- Issue date Sep 8, 2015
- Winbond Electronics Corporation
- Oron Michael
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reading NAND flash memory
- Patent number 8,667,368
- Issue date Mar 4, 2014
- Winbond Electronics Corporation
- Anil Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage boosting in MRAM current drivers
- Patent number 8,400,866
- Issue date Mar 19, 2013
- MagSil Corporation
- Krishnakumar Mani
- G11 - INFORMATION STORAGE
Information Patent Grant
MRAM design with local write conductors of reduced cross-sectional...
- Patent number 7,787,289
- Issue date Aug 31, 2010
- MagSil Corporation
- Krishnakumar Mani
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory apparatus
- Patent number 7,317,630
- Issue date Jan 8, 2008
- Atmel Corporation
- Nicola Telecco
- G11 - INFORMATION STORAGE
Information Patent Grant
Page mode erase in a flash memory array
- Patent number 6,359,810
- Issue date Mar 19, 2002
- Atmel Corporation
- Anil Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Look-up table using multi-level decode
- Patent number 6,351,152
- Issue date Feb 26, 2002
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flash memory array with internal refresh
- Patent number 6,166,959
- Issue date Dec 26, 2000
- Atmel Corporation
- Anil Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Page mode erase in a flash memory array
- Patent number 6,118,705
- Issue date Sep 12, 2000
- Atmel Corporation
- Anil Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory array with internal refresh
- Patent number 6,088,268
- Issue date Jul 11, 2000
- Atmel Corporation
- Anil Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Look-up table using multi-level decode
- Patent number 6,037,829
- Issue date Mar 14, 2000
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual buffer flash memory architecture with multiple operating modes
- Patent number 5,822,245
- Issue date Oct 13, 1998
- Atmel Corporation
- Anil Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Look-up table using multi-level decode
- Patent number 5,815,024
- Issue date Sep 29, 1998
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Look-up table using multi-level decode
- Patent number 5,438,295
- Issue date Aug 1, 1995
- Altera Corporation
- Srinivas T. Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
EEPROM-backed FIFO memory
- Patent number 5,353,248
- Issue date Oct 4, 1994
- Altera Corporation
- Anil Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two transistor flash EPROM cell
- Patent number 5,329,487
- Issue date Jul 12, 1994
- Altera Corporation
- Anil Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable transfer-devices
- Patent number 5,247,478
- Issue date Sep 21, 1993
- Altera Corporation
- Anil Gupta
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NAND Flash Memory Having an Enhanced Buffer Read Capability and Met...
- Publication number 20160034352
- Publication date Feb 4, 2016
- WINBOND ELECTRONICS CORPORATION
- Oron Michael
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
On-Chip Bad Block Management for NAND Flash Memory
- Publication number 20130346671
- Publication date Dec 26, 2013
- WINBOND ELECTRONICS CORPORATION
- Oron Michael
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Reading NAND Flash Memory
- Publication number 20130297987
- Publication date Nov 7, 2013
- WINBOND ELECTRONICS CORPORATION
- Anil Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE BOOSTING IN MRAM CURRENT DRIVERS
- Publication number 20110032755
- Publication date Feb 10, 2011
- MagSil Corporation
- Krishnakumar Mani
- G11 - INFORMATION STORAGE
Information Patent Application
MRAM DESIGN WITH LOCAL WRITE CONDUCTORS OF REDUCED CROSS-SECTIONAL...
- Publication number 20090141542
- Publication date Jun 4, 2009
- Krishnakumar Mani
- G11 - INFORMATION STORAGE
Information Patent Application
Nonvolatile semiconductor memory apparatus
- Publication number 20070014140
- Publication date Jan 18, 2007
- Nicola Telecco
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

NAND flash memory having an enhanced buffer read capability and met...

NAND flash memory array architecture having low read latency and lo...

On-chip bad block management for NAND flash memory

Method and apparatus for reading NAND flash memory

Voltage boosting in MRAM current drivers

MRAM design with local write conductors of reduced cross-sectional...

Nonvolatile semiconductor memory apparatus

Page mode erase in a flash memory array

Look-up table using multi-level decode

Flash memory array with internal refresh

Page mode erase in a flash memory array

Flash memory array with internal refresh

Look-up table using multi-level decode

Dual buffer flash memory architecture with multiple operating modes

Look-up table using multi-level decode

Look-up table using multi-level decode

EEPROM-backed FIFO memory

Two transistor flash EPROM cell

Programmable transfer-devices

Patents Applicationslast 30 patents

NAND Flash Memory Having an Enhanced Buffer Read Capability and Met...

On-Chip Bad Block Management for NAND Flash Memory

Method and Apparatus for Reading NAND Flash Memory

VOLTAGE BOOSTING IN MRAM CURRENT DRIVERS

MRAM DESIGN WITH LOCAL WRITE CONDUCTORS OF REDUCED CROSS-SECTIONAL...

Nonvolatile semiconductor memory apparatus