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ANIRUDH KADIYALA
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Austin, TX, US
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Patents Grants
last 30 patents
Information
Patent Grant
Scan or JTAG controllable capture clock generation
Patent number
9,903,913
Issue date
Feb 27, 2018
Advanced Micro Devices, Inc.
Atchyuth Gorti
G01 - MEASURING TESTING
Information
Patent Grant
On-chip clock controller
Patent number
9,740,234
Issue date
Aug 22, 2017
QUALCOMM Incorporated
Hong Kim
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Configurable Mux-D scan flip-flop design
Patent number
8,694,842
Issue date
Apr 8, 2014
Advanced Micro Devices, Inc.
Atchyuth K. Gorti
G01 - MEASURING TESTING
Information
Patent Grant
Scan or JTAG controllable capture clock generation
Patent number
8,633,725
Issue date
Jan 21, 2014
Advanced Micro Devices, Inc.
Atchyuth K. Gorti
G01 - MEASURING TESTING
Patents Applications
last 30 patents
Information
Patent Application
SCAN OR JTAG CONTROLLABLE CAPTURE CLOCK GENERATION
Publication number
20140359386
Publication date
Dec 4, 2014
Advanced Micro Devices, Inc.
Atchyuth Gorti
G01 - MEASURING TESTING
Information
Patent Application
MODELING MEMORY ARRAYS FOR TEST PATTERN ANALYSIS
Publication number
20140181602
Publication date
Jun 26, 2014
Advanced Micro Devices, Inc.
Vibhor Mittal
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
CONFIGURABLE MUX-D SCAN FLIP-FLOP DESIGN
Publication number
20120124434
Publication date
May 17, 2012
Atchyuth K. Gorti
G01 - MEASURING TESTING
Information
Patent Application
SCAN OR JTAG CONTROLLABLE CAPTURE CLOCK GENERATION
Publication number
20120062266
Publication date
Mar 15, 2012
ATCHYUTH K. GORTI
G01 - MEASURING TESTING