Ankireddy Nalamalpu

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dynamically scalable timing and power models for programmable logic...
- Patent number 12,273,107
- Issue date Apr 8, 2025
- Altera Corporation
- Atul Maheshwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Innovative interconnect design for package architecture to improve...
- Patent number 12,266,625
- Issue date Apr 1, 2025
- Altera Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network-on-chip (NOC) with flexible data width
- Patent number 12,237,831
- Issue date Feb 25, 2025
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-die aging measurements for dynamic timing modeling
- Patent number 12,216,150
- Issue date Feb 4, 2025
- Altera Corporation
- Dheeraj Subbareddy
- G01 - MEASURING TESTING
Information Patent Grant
Programmable logic device with fine-grained disaggregation
- Patent number 12,206,410
- Issue date Jan 21, 2025
- Intel Corporation
- Dheeraj Subbareddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 12,153,866
- Issue date Nov 26, 2024
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor package with universal optical input/output
- Patent number 12,038,858
- Issue date Jul 16, 2024
- Intel Corporation
- Anshuman Thakur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for clock signal transmission in integrated circuits and...
- Patent number 12,026,008
- Issue date Jul 2, 2024
- Altera Corporation
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-latency optical connection for CXL for a server CPU
- Patent number 12,007,929
- Issue date Jun 11, 2024
- Altera Corporation
- Anshuman Thakur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electrical and optical interfaces at different heights along an edg...
- Patent number 11,983,135
- Issue date May 14, 2024
- Intel Corporation
- Dheeraj Subbareddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Innovative interconnect design for package architecture to improve...
- Patent number 11,929,339
- Issue date Mar 12, 2024
- Intel Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microelectronics assembly including top and bottom packages in stac...
- Patent number 11,915,996
- Issue date Feb 27, 2024
- Intel Corporation
- Robert Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect architecture with silicon interposer and EMIB
- Patent number 11,901,299
- Issue date Feb 13, 2024
- Intel Corporation
- Md Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Inter-die communication of programmable logic devices
- Patent number 11,789,883
- Issue date Oct 17, 2023
- Intel Corporation
- Sharath Raghava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 11,714,941
- Issue date Aug 1, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network-on-chip (NOC) with flexible data width
- Patent number 11,700,002
- Issue date Jul 11, 2023
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency translation circuitry for an interconnection in an active...
- Patent number 11,669,472
- Issue date Jun 6, 2023
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Innovative interconnect design for package architecture to improve...
- Patent number 11,658,144
- Issue date May 23, 2023
- Intel Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-speed core interconnect for multi-die programmable logic devices
- Patent number 11,621,713
- Issue date Apr 4, 2023
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-die aging measurements for dynamic timing modeling
- Patent number 11,609,262
- Issue date Mar 21, 2023
- Intel Corporation
- Dheeraj Subbareddy
- G01 - MEASURING TESTING
Information Patent Grant
Connectivity between integrated circuit dice in a multi-chip package
- Patent number 11,610,856
- Issue date Mar 21, 2023
- Intel Corporation
- Robert Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable logic device with fine-grained disaggregation
- Patent number 11,595,045
- Issue date Feb 28, 2023
- Intel Corporation
- Dheeraj Subbareddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect architecture with silicon interposer and EMIB
- Patent number 11,557,541
- Issue date Jan 17, 2023
- Intel Corporation
- Md Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic chip with under-side power block
- Patent number 11,538,753
- Issue date Dec 27, 2022
- Intel Corporation
- MD Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus to synchronize clocks of configurable integrated circuit...
- Patent number 11,528,029
- Issue date Dec 13, 2022
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for clock signal transmission in integrated circuits and...
- Patent number 11,500,412
- Issue date Nov 15, 2022
- Intel Corporation
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for handling integrated circuit dies with defects
- Patent number 11,368,158
- Issue date Jun 21, 2022
- Intel Corporation
- Dheeraj Subbareddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rotatable architecture for multi-chip package (MCP)
- Patent number 11,342,238
- Issue date May 24, 2022
- Intel Corporation
- MD Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Network-on-chip (NOC) with flexible data width
- Patent number 11,342,918
- Issue date May 24, 2022
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Translation circuitry for an interconnection in an active interpose...
- Patent number 11,216,397
- Issue date Jan 4, 2022
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Techniques For Output Control During Update Of An Integrated Circuit
- Publication number 20250105847
- Publication date Mar 27, 2025
- Intel Corporation
- Kasper Wszolek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Current Control Systems And Methods For Communications Between Devices
- Publication number 20250104745
- Publication date Mar 27, 2025
- Intel Corporation
- Kasper Wszolek
- G11 - INFORMATION STORAGE
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20250077753
- Publication date Mar 6, 2025
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR FABRIC ARCHITECTURE IN FPGA PRODUCTS
- Publication number 20240348253
- Publication date Oct 17, 2024
- Atul Maheshwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL TRANSFER WITH A BRIDGE AND HYBRID BUMPS
- Publication number 20240346224
- Publication date Oct 17, 2024
- Mahesh K. Kumashikar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Transferring Heat From Electronic Devices Using Heat...
- Publication number 20240321670
- Publication date Sep 26, 2024
- Altera Corporation
- Atul Maheshwari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic Devices Having Oval Power Delivery Pads
- Publication number 20240321716
- Publication date Sep 26, 2024
- Altera Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Providing Supply Current To Dies In A System Using A...
- Publication number 20240312905
- Publication date Sep 19, 2024
- Altera Corporation
- Md Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Innovative Interconnect Design for Package Architecture to Improve...
- Publication number 20240213201
- Publication date Jun 27, 2024
- Intel Corporation
- MD Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI PROGRAMABLE-DIE MODULE
- Publication number 20240145434
- Publication date May 2, 2024
- Intel Corporation
- Mahesh Kumashikar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB
- Publication number 20240145395
- Publication date May 2, 2024
- Intel Corporation
- MD Altaf HOSSAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques For Arranging Conductive Pads In Electronic Devices
- Publication number 20240120302
- Publication date Apr 11, 2024
- Intel Corporation
- Krishna Bharath Kolluru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques For Shifting Signal Transmission To Compensate For Defec...
- Publication number 20240113014
- Publication date Apr 4, 2024
- Altera Corporation
- Krishna Bharath Kolluru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques For Configuring Repeater Circuits In Active Interconnect...
- Publication number 20240111703
- Publication date Apr 4, 2024
- Altera Corporation
- Mahesh Kumashikar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems And Methods For Coupling Integrated Circuit Dies
- Publication number 20240096810
- Publication date Mar 21, 2024
- Intel Corporation
- Md Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTER-DIE COMMUNICATION OF PROGRAMMABLE LOGIC DEVICES
- Publication number 20240028544
- Publication date Jan 25, 2024
- Intel Corporation
- Sharath Raghava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Network-on-Chip (NOC) with Flexible Data Width
- Publication number 20230370068
- Publication date Nov 16, 2023
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Innovative Interconnect Design for Package Architecture to Improve...
- Publication number 20230352431
- Publication date Nov 2, 2023
- Intel Corporation
- MD Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Architecture and Testing for an Integrated Circuit Package
- Publication number 20230341463
- Publication date Oct 26, 2023
- Kalyana Ravindra Kantipudi
- G01 - MEASURING TESTING
Information Patent Application
Circuit Systems And Methods For Transmitting Signals Between Devices
- Publication number 20230342309
- Publication date Oct 26, 2023
- Intel Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems And Methods For Selecting Decoupling Capacitance Using A Po...
- Publication number 20230334212
- Publication date Oct 19, 2023
- Intel Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20230306173
- Publication date Sep 28, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE LOGIC DEVICE WITH FINE-GRAINED DISAGGREGATION
- Publication number 20230198526
- Publication date Jun 22, 2023
- Intel Corporation
- Dheeraj Subbareddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
On-Die Aging Measurements for Dynamic Timing Modeling
- Publication number 20230129176
- Publication date Apr 27, 2023
- Intel Corporation
- Dheeraj Subbareddy
- G01 - MEASURING TESTING
Information Patent Application
INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB
- Publication number 20230107106
- Publication date Apr 6, 2023
- Intel Corporation
- MD Altaf HOSSAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques For Clock Signal Transmission In Integrated Circuits And...
- Publication number 20230049681
- Publication date Feb 16, 2023
- Intel Corporation
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Die-to-Die Interconnect Architecture for Hardware-Agnostic Modeling
- Publication number 20230042718
- Publication date Feb 9, 2023
- Ankireddy Nalamalpu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Booting A Compute Integrated Circuit Using A Boot Ma...
- Publication number 20230035058
- Publication date Feb 2, 2023
- Intel Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Backside Metallization for FPGA Resources
- Publication number 20230024515
- Publication date Jan 26, 2023
- Atul Maheshwari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE IO ESCAPE ROUTING ON A DISAGGREGATED SHORELINE
- Publication number 20230028475
- Publication date Jan 26, 2023
- Ankireddy Nalamalpu
- H01 - BASIC ELECTRIC ELEMENTS

Ankireddy Nalamalpu

Person

Patents Grantslast 30 patents

Dynamically scalable timing and power models for programmable logic...

Innovative interconnect design for package architecture to improve...

Network-on-chip (NOC) with flexible data width

On-die aging measurements for dynamic timing modeling

Programmable logic device with fine-grained disaggregation

Modular periphery tile for integrated circuit device

Processor package with universal optical input/output

Techniques for clock signal transmission in integrated circuits and...

Low-latency optical connection for CXL for a server CPU

Electrical and optical interfaces at different heights along an edg...

Innovative interconnect design for package architecture to improve...

Microelectronics assembly including top and bottom packages in stac...

Interconnect architecture with silicon interposer and EMIB

Inter-die communication of programmable logic devices

Modular periphery tile for integrated circuit device

Network-on-chip (NOC) with flexible data width

Frequency translation circuitry for an interconnection in an active...

Innovative interconnect design for package architecture to improve...

High-speed core interconnect for multi-die programmable logic devices

On-die aging measurements for dynamic timing modeling

Connectivity between integrated circuit dice in a multi-chip package

Programmable logic device with fine-grained disaggregation

Interconnect architecture with silicon interposer and EMIB

Electronic chip with under-side power block

Apparatus to synchronize clocks of configurable integrated circuit...

Techniques for clock signal transmission in integrated circuits and...

Methods for handling integrated circuit dies with defects

Rotatable architecture for multi-chip package (MCP)

Network-on-chip (NOC) with flexible data width

Translation circuitry for an interconnection in an active interpose...

Patents Applicationslast 30 patents

Techniques For Output Control During Update Of An Integrated Circuit

Current Control Systems And Methods For Communications Between Devices

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

MODULAR FABRIC ARCHITECTURE IN FPGA PRODUCTS

SIGNAL TRANSFER WITH A BRIDGE AND HYBRID BUMPS

Techniques For Transferring Heat From Electronic Devices Using Heat...

Electronic Devices Having Oval Power Delivery Pads

Techniques For Providing Supply Current To Dies In A System Using A...

Innovative Interconnect Design for Package Architecture to Improve...

MULTI PROGRAMABLE-DIE MODULE

INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB

Techniques For Arranging Conductive Pads In Electronic Devices

Techniques For Shifting Signal Transmission To Compensate For Defec...

Techniques For Configuring Repeater Circuits In Active Interconnect...

Systems And Methods For Coupling Integrated Circuit Dies

INTER-DIE COMMUNICATION OF PROGRAMMABLE LOGIC DEVICES

Network-on-Chip (NOC) with Flexible Data Width

Innovative Interconnect Design for Package Architecture to Improve...

Architecture and Testing for an Integrated Circuit Package

Circuit Systems And Methods For Transmitting Signals Between Devices

Systems And Methods For Selecting Decoupling Capacitance Using A Po...

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

PROGRAMMABLE LOGIC DEVICE WITH FINE-GRAINED DISAGGREGATION

On-Die Aging Measurements for Dynamic Timing Modeling

INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB

Techniques For Clock Signal Transmission In Integrated Circuits And...

Die-to-Die Interconnect Architecture for Hardware-Agnostic Modeling

Techniques For Booting A Compute Integrated Circuit Using A Boot Ma...

Backside Metallization for FPGA Resources

PACKAGE IO ESCAPE ROUTING ON A DISAGGREGATED SHORELINE