Ankush Oberai

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Segregating defects based on computer-aided design (CAD) identifier...
- Patent number 11,861,286
- Issue date Jan 2, 2024
- Synopsys, Inc.
- Ankush B. Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Net-based wafer inspection
- Patent number 11,763,059
- Issue date Sep 19, 2023
- Synopsys, Inc.
- Ankush Bharati Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Correlation between emission spots utilizing CAD data in combinatio...
- Patent number 11,561,256
- Issue date Jan 24, 2023
- Synopsys, Inc.
- Ankush Bharati Oberai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic virtual layer
- Patent number 10,990,077
- Issue date Apr 27, 2021
- Synopsys, Inc.
- Ankush Bharati Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Video overlay
- Patent number 10,650,509
- Issue date May 12, 2020
- Synopsys, Inc.
- Ankush Bharati Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic virtual layer
- Patent number 10,295,988
- Issue date May 21, 2019
- Synopsys, Inc.
- Ankush Bharati Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip cross-section identification and rendering analysis
- Patent number 9,471,745
- Issue date Oct 18, 2016
- Synopsys, Inc.
- Xi-Wei Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual layer generation during failure analysis
- Patent number 9,454,635
- Issue date Sep 27, 2016
- Synopsys, Inc.
- Ankush Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Failure analysis and inline defect characterization
- Patent number 9,430,606
- Issue date Aug 30, 2016
- Synopsys, Inc.
- Ankush Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip cross-section identification and rendering during failure anal...
- Patent number 9,147,027
- Issue date Sep 29, 2015
- Synopsys, Inc.
- Xi-Wei Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automated inline defect characterization
- Patent number 8,826,209
- Issue date Sep 2, 2014
- Synopsys, Inc.
- James Robert Kramer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Failure analysis using design rules
- Patent number 8,775,979
- Issue date Jul 8, 2014
- Synopsys Inc.
- Ankush Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal tracing through boards and chips
- Patent number 8,255,865
- Issue date Aug 28, 2012
- Synopsys, Inc.
- Ankush Oberai
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SEGREGATING DEFECTS BASED ON COMPUTER-AIDED DESIGN (CAD) IDENTIFIER...
- Publication number 20210406441
- Publication date Dec 30, 2021
- Synopsys, Inc.
- Ankush B. Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Correlation between Emission Spots Utilizing CAD Data in Combinatio...
- Publication number 20210199714
- Publication date Jul 1, 2021
- Synopsys, Inc.
- Ankush Bharati OBERAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NET-BASED WAFER INSPECTION
- Publication number 20210192116
- Publication date Jun 24, 2021
- Synopsys, Inc.
- Ankush Bharati Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRONIC VIRTUAL LAYER
- Publication number 20190302732
- Publication date Oct 3, 2019
- Synopsys, Inc.
- Ankush Bharati Oberai
- G05 - CONTROLLING REGULATING
Information Patent Application
VIDEO OVERLAY
- Publication number 20180068428
- Publication date Mar 8, 2018
- Synopsys, Inc.
- Ankush Bharati Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRONIC VIRTUAL LAYER
- Publication number 20180059643
- Publication date Mar 1, 2018
- Synopsys, Inc.
- Ankush Bharati Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHIP CROSS-SECTION IDENTIFICATION AND RENDERING ANALYSIS
- Publication number 20160019331
- Publication date Jan 21, 2016
- Synopsys, Inc.
- Xi-Wei Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL LAYER GENERATION DURING FAILURE ANALYSIS
- Publication number 20150213189
- Publication date Jul 30, 2015
- Synopsys, Inc.
- Ankush Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHIP CROSS-SECTION IDENTIFICATION AND RENDERING DURING FAILURE ANAL...
- Publication number 20150007121
- Publication date Jan 1, 2015
- Synopsys, Inc.
- Xi-Wei Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAILURE ANALYSIS AND INLINE DEFECT CHARACTERIZATION
- Publication number 20140310670
- Publication date Oct 16, 2014
- Ankush Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED INLINE DEFECT CHARACTERIZATION
- Publication number 20130007684
- Publication date Jan 3, 2013
- James Robert Kramer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL TRACING THROUGH BOARDS AND CHIPS
- Publication number 20110191742
- Publication date Aug 4, 2011
- Ankush Oberai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAILURE ANALYSIS USING DESIGN RULES
- Publication number 20110191725
- Publication date Aug 4, 2011
- Ankush Oberai
- G06 - COMPUTING CALCULATING COUNTING

Ankush Oberai

Person

Patents Grantslast 30 patents

Segregating defects based on computer-aided design (CAD) identifier...

Net-based wafer inspection

Correlation between emission spots utilizing CAD data in combinatio...

Electronic virtual layer

Video overlay

Electronic virtual layer

Chip cross-section identification and rendering analysis

Virtual layer generation during failure analysis

Failure analysis and inline defect characterization

Chip cross-section identification and rendering during failure anal...

Automated inline defect characterization

Failure analysis using design rules

Signal tracing through boards and chips

Patents Applicationslast 30 patents

SEGREGATING DEFECTS BASED ON COMPUTER-AIDED DESIGN (CAD) IDENTIFIER...

Correlation between Emission Spots Utilizing CAD Data in Combinatio...

NET-BASED WAFER INSPECTION

ELECTRONIC VIRTUAL LAYER

VIDEO OVERLAY

ELECTRONIC VIRTUAL LAYER

CHIP CROSS-SECTION IDENTIFICATION AND RENDERING ANALYSIS

VIRTUAL LAYER GENERATION DURING FAILURE ANALYSIS

CHIP CROSS-SECTION IDENTIFICATION AND RENDERING DURING FAILURE ANAL...

FAILURE ANALYSIS AND INLINE DEFECT CHARACTERIZATION

AUTOMATED INLINE DEFECT CHARACTERIZATION

SIGNAL TRACING THROUGH BOARDS AND CHIPS

FAILURE ANALYSIS USING DESIGN RULES