Anthony Jarvis

Person

Acton, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Merged branch target buffer entries
- Patent number 12,153,927
- Issue date Nov 26, 2024
- Advanced Micro Devices, Inc.
- Thomas Clouqueur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-table branch target buffer
- Patent number 11,416,253
- Issue date Aug 16, 2022
- Advanced Micro Devices, Inc.
- Thomas Clouqueur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using loop exit prediction to accelerate or suppress loop mode of a...
- Patent number 11,256,505
- Issue date Feb 22, 2022
- Advanced Micro Devices, Inc.
- Arunachalam Annamalai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loop exit predictor
- Patent number 11,216,279
- Issue date Jan 4, 2022
- Advanced Micro Devices, Inc.
- Anthony Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using loop exit prediction to accelerate or suppress loop mode of a...
- Patent number 10,915,322
- Issue date Feb 9, 2021
- Advanced Micro Devices, Inc.
- Arunachalam Annamalai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-table branch target buffer
- Patent number 10,713,054
- Issue date Jul 14, 2020
- Advanced Micro Devices, Inc.
- Thomas Cloqueur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power efficient pattern history table fetch in branch predictor
- Patent number 9,778,934
- Issue date Oct 3, 2017
- Advanced Micro Devices, Inc.
- Anthony Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined level 1 and level 2 branch predictor
- Patent number 8,788,797
- Issue date Jul 22, 2014
- Advanced Micro Devices, Inc.
- Trivikram Krishnamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting branch direction and target address pattern and supplying...
- Patent number 8,667,257
- Issue date Mar 4, 2014
- Advanced Micro Devices, Inc.
- Ravindra N. Bhargava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loop predictor and method for instruction fetching using a loop pre...
- Patent number 8,578,141
- Issue date Nov 5, 2013
- Advanced Micro Devices, Inc.
- Anthony Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid branch prediction device with sparse and dense prediction ca...
- Patent number 8,181,005
- Issue date May 15, 2012
- Advanced Micro Devices, Inc.
- Gerald D. Zuraski, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for executing variable latency load operations in...
- Patent number 7,757,066
- Issue date Jul 13, 2010
- STMicroelectronics, Inc.
- Anthony X. Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for instruction compression and dispersal in wid...
- Patent number 7,143,268
- Issue date Nov 28, 2006
- STMicroelectronics, Inc.
- Paolo Faraboschi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bypass circuitry for use in a pipelined processor
- Patent number 7,093,107
- Issue date Aug 15, 2006
- STMicroelectronics, Inc.
- Anthony X. Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction fetch apparatus for wide issue processors and method of...
- Patent number 7,028,164
- Issue date Apr 11, 2006
- STMicroelectronics, Inc.
- Anthony X. Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for encoding constant operands in a wide issue pr...
- Patent number 6,922,773
- Issue date Jul 26, 2005
- STMicroelectronics, Inc.
- Paolo Faraboschi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor pipeline cache miss apparatus and method for operation
- Patent number 6,865,665
- Issue date Mar 8, 2005
- STMicroelectronics, Inc.
- Anthony X. Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for supporting precise exceptions in a data proce...
- Patent number 6,807,628
- Issue date Oct 19, 2004
- STMicroelectronics, Inc.
- Mark Owen Homewood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for reducing power consumption in a data processo...
- Patent number 6,772,355
- Issue date Aug 3, 2004
- STMicroelectronics, Inc.
- Mark Owen Homewood
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ENFORCING CONSISTENCY ACROSS REDUNDANT TAGGED GEOMETRIC (TAGE) BRAN...
- Publication number 20230315468
- Publication date Oct 5, 2023
- ADVANCED MICRO DEVICES, INC.
- ANTHONY JARVIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID PARALLELIZED TAGGED GEOMETRIC (TAGE) BRANCH PREDICTION
- Publication number 20230315469
- Publication date Oct 5, 2023
- ADVANCED MICRO DEVICES, INC.
- Anthony JARVIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING LARGE TAGE HISTORIES
- Publication number 20230315475
- Publication date Oct 5, 2023
- ADVANCED MICRO DEVICES, INC.
- Anthony JARVIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MERGED BRANCH TARGET BUFFER ENTRIES
- Publication number 20210373896
- Publication date Dec 2, 2021
- ADVANCED MICRO DEVICES, INC.
- THOMAS CLOUQUEUR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING LOOP EXIT PREDICTION TO ACCELERATE OR SUPPRESS LOOP MODE OF A...
- Publication number 20210191722
- Publication date Jun 24, 2021
- ADVANCED MICRO DEVICES, INC.
- Arunachalam ANNAMALAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE-TABLE BRANCH TARGET BUFFER
- Publication number 20200341770
- Publication date Oct 29, 2020
- ADVANCED MICRO DEVICES, INC.
- Thomas CLOUQUEUR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOP EXIT PREDICTOR
- Publication number 20200167164
- Publication date May 28, 2020
- ADVANCED MICRO DEVICES, INC.
- Anthony JARVIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE-TABLE BRANCH TARGET BUFFER
- Publication number 20200012497
- Publication date Jan 9, 2020
- ADVANCED MICRO DEVICES, INC.
- Thomas CLOUQUEUR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED LEVEL 1 AND LEVEL 2 BRANCH PREDICTOR
- Publication number 20120166775
- Publication date Jun 28, 2012
- Advanced Micro Devices, Inc.
- Trivikram Krishnamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER EFFICIENT PATTERN HISTORY TABLE FETCH IN BRANCH PREDICTOR
- Publication number 20120124349
- Publication date May 17, 2012
- Advanced Micro Devices, Inc.
- Anthony Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOP PREDICTOR AND METHOD FOR INSTRUCTION FETCHING USING A LOOP PRE...
- Publication number 20120124344
- Publication date May 17, 2012
- Advanced Micro Devices, Inc.
- Anthony Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REPLAY OF DETECTED PATTERNS IN PREDICTED INSTRUCTIONS
- Publication number 20120117362
- Publication date May 10, 2012
- Ravindra N. Bhargava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLASSIFYING AND SEGREGATING BRANCH TARGETS
- Publication number 20110093658
- Publication date Apr 21, 2011
- Gerald D. Zuraski, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID BRANCH PREDICTION DEVICE WITH SPARSE AND DENSE PREDICTION CA...
- Publication number 20100064123
- Publication date Mar 11, 2010
- Gerald D. Zuraski, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bypass circuitry for use in a pipelined processor
- Publication number 20030014614
- Publication date Jan 16, 2003
- Anthony X. Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for supporting precise exceptions in a data proce...
- Publication number 20020124163
- Publication date Sep 5, 2002
- Mark Owen Homewood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for instruction compression and dispersal in wid...
- Publication number 20020087830
- Publication date Jul 4, 2002
- Paolo Faraboschi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor pipeline stall apparatus and method of operation
- Publication number 20020087838
- Publication date Jul 4, 2002
- Anthony X. Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction fetch apparatus for wide issue processors and method of...
- Publication number 20020087832
- Publication date Jul 4, 2002
- Anthony X. Jarvis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for reducing power consumption in a data processo...
- Publication number 20020087900
- Publication date Jul 4, 2002
- Mark Owen Homewood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for encoding constant operands in a wide issue pr...
- Publication number 20020087834
- Publication date Jul 4, 2002
- STMicroelectronics, Inc.
- Paolo Faraboschi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for executing variable latency load operations in...
- Publication number 20020087839
- Publication date Jul 4, 2002
- Anthony X. Jarvis
- G06 - COMPUTING CALCULATING COUNTING

Anthony Jarvis

Person

Patents Grantslast 30 patents

Merged branch target buffer entries

Multiple-table branch target buffer

Using loop exit prediction to accelerate or suppress loop mode of a...

Loop exit predictor

Using loop exit prediction to accelerate or suppress loop mode of a...

Multiple-table branch target buffer

Power efficient pattern history table fetch in branch predictor

Combined level 1 and level 2 branch predictor

Detecting branch direction and target address pattern and supplying...

Loop predictor and method for instruction fetching using a loop pre...

Hybrid branch prediction device with sparse and dense prediction ca...

System and method for executing variable latency load operations in...

Circuit and method for instruction compression and dispersal in wid...

Bypass circuitry for use in a pipelined processor

Instruction fetch apparatus for wide issue processors and method of...

System and method for encoding constant operands in a wide issue pr...

Processor pipeline cache miss apparatus and method for operation

System and method for supporting precise exceptions in a data proce...

System and method for reducing power consumption in a data processo...

Patents Applicationslast 30 patents

ENFORCING CONSISTENCY ACROSS REDUNDANT TAGGED GEOMETRIC (TAGE) BRAN...

HYBRID PARALLELIZED TAGGED GEOMETRIC (TAGE) BRANCH PREDICTION

MANAGING LARGE TAGE HISTORIES

MERGED BRANCH TARGET BUFFER ENTRIES

USING LOOP EXIT PREDICTION TO ACCELERATE OR SUPPRESS LOOP MODE OF A...

MULTIPLE-TABLE BRANCH TARGET BUFFER

LOOP EXIT PREDICTOR

MULTIPLE-TABLE BRANCH TARGET BUFFER

COMBINED LEVEL 1 AND LEVEL 2 BRANCH PREDICTOR

POWER EFFICIENT PATTERN HISTORY TABLE FETCH IN BRANCH PREDICTOR

LOOP PREDICTOR AND METHOD FOR INSTRUCTION FETCHING USING A LOOP PRE...

REPLAY OF DETECTED PATTERNS IN PREDICTED INSTRUCTIONS

CLASSIFYING AND SEGREGATING BRANCH TARGETS

HYBRID BRANCH PREDICTION DEVICE WITH SPARSE AND DENSE PREDICTION CA...

Bypass circuitry for use in a pipelined processor

System and method for supporting precise exceptions in a data proce...

Circuit and method for instruction compression and dispersal in wid...

Processor pipeline stall apparatus and method of operation

Instruction fetch apparatus for wide issue processors and method of...

System and method for reducing power consumption in a data processo...

System and method for encoding constant operands in a wide issue pr...

System and method for executing variable latency load operations in...