Anton P. Eppich

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Vertical access line in a folded digitline sense amplifier
- Patent number 12,114,489
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Anton P. Eppich
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated assemblies
- Patent number 11,264,320
- Issue date Mar 1, 2022
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sub-resolution assist devices and methods
- Patent number 9,128,383
- Issue date Sep 8, 2015
- Micron Technology, Inc.
- Anton P. Eppich
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
DRAM cell design with folded digitline sense amplifier
- Patent number 8,952,437
- Issue date Feb 10, 2015
- Micron Technology, Inc.
- Fei Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Sub-resolution assist devices and methods
- Patent number 8,736,811
- Issue date May 27, 2014
- Micron Technology, Inc.
- Anton P. Eppich
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
DRAM cell design with folded digitline sense amplifier
- Patent number 8,716,772
- Issue date May 6, 2014
- Micron Technology, Inc.
- Fei Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Relaxed-pitch method of aligning active area to digit line
- Patent number 8,354,317
- Issue date Jan 15, 2013
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell with a vertically oriented transistor coupled to a digi...
- Patent number 8,183,615
- Issue date May 22, 2012
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sub-resolution assist devices and methods
- Patent number 7,961,292
- Issue date Jun 14, 2011
- Micron Technology, Inc.
- Anton P. Eppich
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Relaxed-pitch method of aligning active area to digit line
- Patent number 7,915,116
- Issue date Mar 29, 2011
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell with buried digit line
- Patent number 7,825,452
- Issue date Nov 2, 2010
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dram cell design with folded digitline architecture and angled acti...
- Patent number 7,613,025
- Issue date Nov 3, 2009
- Micron Technology, Inc.
- Fei Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Relaxed-pitch method of aligning active area to digit line
- Patent number 7,541,632
- Issue date Jun 2, 2009
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
6F2 DRAM cell design with 3F-pitch folded digitline sense amplifier
- Patent number 7,349,232
- Issue date Mar 25, 2008
- Micron Technology, Inc.
- Fei Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with overlapping buried digit line and active area and...
- Patent number 7,271,057
- Issue date Sep 18, 2007
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell, array, device and system with overlapping buried digit...
- Patent number 7,042,047
- Issue date May 9, 2006
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PATTERNING OF 3D NAND PILLARS AND FLYING BUTTRESS SUPPORTS WITH TWO...
- Publication number 20230395528
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Shruti Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERNING OF 3D NAND PILLARS AND FLYING BUTTRESS SUPPORTS WITH THR...
- Publication number 20230395529
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL ACCESS LINE IN A FOLDED DIGITLINE SENSE AMPLIFIER
- Publication number 20230180467
- Publication date Jun 8, 2023
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUB-RESOLUTION ASSIST DEVICES AND METHODS
- Publication number 20140248554
- Publication date Sep 4, 2014
- Micron Technology, Inc.
- Anton P. Eppich
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
DRAM CELL DESIGN WITH FOLDED DIGITLINE SENSE AMPLIFIER
- Publication number 20140241025
- Publication date Aug 28, 2014
- Micron Technology, Inc.
- FEI WANG
- G11 - INFORMATION STORAGE
Information Patent Application
SUB-RESOLUTION ASSIST DEVICES AND METHODS
- Publication number 20110235009
- Publication date Sep 29, 2011
- Anton P. Eppich
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
RELAXED-PITCH METHOD OF ALIGNING ACTIVE AREA TO DIGIT LINE
- Publication number 20110156116
- Publication date Jun 30, 2011
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CELL WITH A VERTICALLY ORIENTED TRANSISTOR COUPLED TO A DIGI...
- Publication number 20110042734
- Publication date Feb 24, 2011
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELAXED-PITCH METHOD OF ALIGNING ACTIVE AREA TO DIGIT LINE
- Publication number 20090215236
- Publication date Aug 27, 2009
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUB-RESOLUTION ASSIST DEVICES AND METHODS
- Publication number 20080278700
- Publication date Nov 13, 2008
- Micron Technology, Inc.
- Anton P. Eppich
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
6F2 DRAM CELL DESIGN WITH 3F-PITCH FOLDED DIGITLINE SENSE AMPLIFIER
- Publication number 20080137392
- Publication date Jun 12, 2008
- Micron Technology, Inc.
- Fei Wang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL WITH BURIED DIGIT LINE
- Publication number 20080017905
- Publication date Jan 24, 2008
- Micron Technology, Inc.
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
6F² DRAM cell design with 3F-pitch folded digitline sense amplifier
- Publication number 20070217245
- Publication date Sep 20, 2007
- Fei Wang
- G11 - INFORMATION STORAGE
Information Patent Application
DRAM cell design with folded digitline sense amplifier
- Publication number 20070145450
- Publication date Jun 28, 2007
- Fei Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Relaxed-pitch method of aligning active area to digit line
- Publication number 20060278911
- Publication date Dec 14, 2006
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory array with overlapping buried digit line and active area and...
- Publication number 20060043431
- Publication date Mar 2, 2006
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CELL, ARRAY, DEVICE AND SYSTEM WITH OVERLAPPING BURIED DIGIT...
- Publication number 20060043473
- Publication date Mar 2, 2006
- Anton P. Eppich
- H01 - BASIC ELECTRIC ELEMENTS

Anton P. Eppich

Person

Patents Grantslast 30 patents

Vertical access line in a folded digitline sense amplifier

Integrated assemblies

Sub-resolution assist devices and methods

DRAM cell design with folded digitline sense amplifier

Sub-resolution assist devices and methods

DRAM cell design with folded digitline sense amplifier

Relaxed-pitch method of aligning active area to digit line

Memory cell with a vertically oriented transistor coupled to a digi...

Sub-resolution assist devices and methods

Relaxed-pitch method of aligning active area to digit line

Memory cell with buried digit line

Dram cell design with folded digitline architecture and angled acti...

Relaxed-pitch method of aligning active area to digit line

6F2 DRAM cell design with 3F-pitch folded digitline sense amplifier

Memory array with overlapping buried digit line and active area and...

Memory cell, array, device and system with overlapping buried digit...

Patents Applicationslast 30 patents

PATTERNING OF 3D NAND PILLARS AND FLYING BUTTRESS SUPPORTS WITH TWO...

PATTERNING OF 3D NAND PILLARS AND FLYING BUTTRESS SUPPORTS WITH THR...

VERTICAL ACCESS LINE IN A FOLDED DIGITLINE SENSE AMPLIFIER

SUB-RESOLUTION ASSIST DEVICES AND METHODS

DRAM CELL DESIGN WITH FOLDED DIGITLINE SENSE AMPLIFIER

SUB-RESOLUTION ASSIST DEVICES AND METHODS

RELAXED-PITCH METHOD OF ALIGNING ACTIVE AREA TO DIGIT LINE

MEMORY CELL WITH A VERTICALLY ORIENTED TRANSISTOR COUPLED TO A DIGI...

RELAXED-PITCH METHOD OF ALIGNING ACTIVE AREA TO DIGIT LINE

SUB-RESOLUTION ASSIST DEVICES AND METHODS

6F2 DRAM CELL DESIGN WITH 3F-PITCH FOLDED DIGITLINE SENSE AMPLIFIER

MEMORY CELL WITH BURIED DIGIT LINE

6F² DRAM cell design with 3F-pitch folded digitline sense amplifier

DRAM cell design with folded digitline sense amplifier

Relaxed-pitch method of aligning active area to digit line

Memory array with overlapping buried digit line and active area and...

MEMORY CELL, ARRAY, DEVICE AND SYSTEM WITH OVERLAPPING BURIED DIGIT...