Antonino Capri'

Person

Villafranca T., IT

People

Patents Grantslast 30 patents

Information Patent Grant
Controller architecture for reliability, availability, serviceabili...
- Patent number 12,164,773
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Emanuele Confalonieri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Access request management using sub-commands
- Patent number 11,960,770
- Issue date Apr 16, 2024
- Micron Technology, Inc.
- Simone Corbetta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managed memory systems with multiple priority queues
- Patent number 11,914,893
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Nicola Del Gatto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system architecture for heterogeneous memory technologies
- Patent number 11,614,892
- Issue date Mar 28, 2023
- Micron Technology, Inc.
- Simone Corbetta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface for memory having a cache and multiple independent arrays
- Patent number 11,132,311
- Issue date Sep 28, 2021
- Micron Technology, Inc.
- Dionisio Minopoli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface for memory having a cache and multiple independent arrays
- Patent number 10,534,731
- Issue date Jan 14, 2020
- Micron Technology, Inc.
- Dionisio Minopoli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Security memory access method and apparatus
- Patent number 9,378,157
- Issue date Jun 28, 2016
- Micron Technology, Inc.
- Marco Messina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Security memory access method and apparatus
- Patent number 8,776,174
- Issue date Jul 8, 2014
- Micron Technology, Inc.
- Marco Messina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced security memory access method and architecture
- Patent number 8,276,185
- Issue date Sep 25, 2012
- Micron Technology, Inc.
- Marco Messina
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CONTROLLER ARCHITECTURE FOR RELIABILITY, AVAILABILITY, SERVICEABILI...
- Publication number 20250085859
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Emanuele Confalonieri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POST PACKAGE REPAIR RESOURCES FOR MEMORY DEVICES
- Publication number 20250077348
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Antonino Capri'
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROW MAPPING IN A MEMORY CONTROLLER
- Publication number 20250068520
- Publication date Feb 27, 2025
- Micron Technology, Inc.
- Antonino Caprì
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROW ACTIVATION INDICATION REGISTERS
- Publication number 20250006248
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Graziano Mirichigni
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY FAILURE PREDICTION AND MITIGATION
- Publication number 20240403177
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Su Wei Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGED MEMORY SYSTEMS WITH MULTIPLE PRIORITY QUEUES
- Publication number 20240272831
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Nicola Del Gatto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLER ARCHITECTURE FOR RELIABILITY, AVAILABILITY, SERVICEABILI...
- Publication number 20240126441
- Publication date Apr 18, 2024
- Micron Technology, Inc.
- Emanuele Confalonieri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCESS REQUEST MANAGEMENT USING SUB-COMMANDS
- Publication number 20230062130
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Simone Corbetta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTABLE TIMER COMPONENT FOR SEMICONDUCTOR DEVICES
- Publication number 20220374150
- Publication date Nov 24, 2022
- Micron Technology, Inc.
- Antonino Caprì
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM ARCHITECTURE FOR HETEROGENEOUS MEMORY TECHNOLOGIES
- Publication number 20220197552
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Simone Corbetta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGED MEMORY SYSTEMS WITH MULTIPLE PRIORITY QUEUES
- Publication number 20220155997
- Publication date May 19, 2022
- Micron Technology, Inc.
- Nicola Del Gatto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE FOR MEMORY HAVING A CACHE AND MULTIPLE INDEPENDENT ARRAYS
- Publication number 20200104268
- Publication date Apr 2, 2020
- Micron Technology, Inc.
- Dionisio Minopoli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE FOR MEMORY HAVING A CACHE AND MULTIPLE INDEPENDENT ARRAYS
- Publication number 20190286586
- Publication date Sep 19, 2019
- Micron Technology, Inc.
- Dionisio Minopoli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURITY MEMORY ACCESS METHOD AND APPARATUS
- Publication number 20140325176
- Publication date Oct 30, 2014
- Marco Messina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURITY MEMORY ACCESS METHOD AND APPARATUS
- Publication number 20130014215
- Publication date Jan 10, 2013
- Marco MESSINA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced security memory access method and architecture
- Publication number 20070192828
- Publication date Aug 16, 2007
- STMicroelectronics S.r.l.
- Marco Messina
- G06 - COMPUTING CALCULATING COUNTING

Antonino Capri'

Person

Patents Grantslast 30 patents

Controller architecture for reliability, availability, serviceabili...

Access request management using sub-commands

Managed memory systems with multiple priority queues

Memory system architecture for heterogeneous memory technologies

Interface for memory having a cache and multiple independent arrays

Interface for memory having a cache and multiple independent arrays

Security memory access method and apparatus

Security memory access method and apparatus

Enhanced security memory access method and architecture

Patents Applicationslast 30 patents

CONTROLLER ARCHITECTURE FOR RELIABILITY, AVAILABILITY, SERVICEABILI...

POST PACKAGE REPAIR RESOURCES FOR MEMORY DEVICES

ROW MAPPING IN A MEMORY CONTROLLER

ROW ACTIVATION INDICATION REGISTERS

MEMORY FAILURE PREDICTION AND MITIGATION

MANAGED MEMORY SYSTEMS WITH MULTIPLE PRIORITY QUEUES

CONTROLLER ARCHITECTURE FOR RELIABILITY, AVAILABILITY, SERVICEABILI...

ACCESS REQUEST MANAGEMENT USING SUB-COMMANDS

ADJUSTABLE TIMER COMPONENT FOR SEMICONDUCTOR DEVICES

MEMORY SYSTEM ARCHITECTURE FOR HETEROGENEOUS MEMORY TECHNOLOGIES

MANAGED MEMORY SYSTEMS WITH MULTIPLE PRIORITY QUEUES

INTERFACE FOR MEMORY HAVING A CACHE AND MULTIPLE INDEPENDENT ARRAYS

INTERFACE FOR MEMORY HAVING A CACHE AND MULTIPLE INDEPENDENT ARRAYS

SECURITY MEMORY ACCESS METHOD AND APPARATUS

SECURITY MEMORY ACCESS METHOD AND APPARATUS

Enhanced security memory access method and architecture