Anubhav SRIVASTAVA

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Noida, IN

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Patents Grantslast 30 patents

Information Patent Grant
Low power, self-gated, pulse triggered clock gating cell
- Patent number 7,808,279
- Issue date Oct 5, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Anubhav Srivastava
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT WITH LEAKAGE REDUCTION IN STATIC NETS
- Publication number 20110181331
- Publication date Jul 28, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Anubhav SRIVASTAVA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER, SELF-GATED, PULSE TRIGGERED CLOCK GATING CELL
- Publication number 20100109707
- Publication date May 6, 2010
- FREESCALE SEMICONDUCTROR, INC
- Anubhav SRIVASTAVA
- G06 - COMPUTING CALCULATING COUNTING