Anupama Thaploo

Person

Maricopa, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Adaptive multibit bus for energy optimization
- Patent number 11,636,831
- Issue date Apr 25, 2023
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current steering level-shifter
- Patent number 11,489,526
- Issue date Nov 1, 2022
- Intel Corporation
- Andres Malavasi Mora
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System, apparatus and method for segmenting a memory array
- Patent number 11,176,990
- Issue date Nov 16, 2021
- Intel Corporation
- Bhushan M. Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive multibit bus for energy optimization
- Patent number 11,081,091
- Issue date Aug 3, 2021
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Double edge triggered Mux-D scan flip-flop
- Patent number 11,054,470
- Issue date Jul 6, 2021
- Intel Corporation
- Amit Agarwal
- G01 - MEASURING TESTING
Information Patent Grant
System, apparatus and method for providing a local clock signal for...
- Patent number 10,817,012
- Issue date Oct 27, 2020
- Intel Corporation
- Iqbal R. Rajwani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for segmenting a memory array
- Patent number 10,790,010
- Issue date Sep 29, 2020
- Intel Corporation
- Bhushan M. Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for reducing voltage swing on an inter...
- Patent number 10,762,877
- Issue date Sep 1, 2020
- Intel Corporation
- Anupama A. Thaploo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing aging of register file keeper circuits
- Patent number 10,754,809
- Issue date Aug 25, 2020
- Intel Corporation
- Anupama A. Thaploo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current steering level-shifter
- Patent number 10,666,259
- Issue date May 26, 2020
- Intel Corporation
- Andres Malavasi Mora
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pulse triggered flip flop
- Patent number 10,587,244
- Issue date Mar 10, 2020
- Intel Corporation
- Bhushan M. Borole
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adaptive multibit bus for energy optimization
- Patent number 10,490,170
- Issue date Nov 26, 2019
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for data retention and supply noise mitigation using clamps
- Patent number 10,418,076
- Issue date Sep 17, 2019
- Intel Corporation
- Pascal A. Meinerzhagen
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-bit pulsed latch including serial scan chain
- Patent number 10,410,699
- Issue date Sep 10, 2019
- Intel Corporation
- Anupama A. Thaploo
- G01 - MEASURING TESTING
Information Patent Grant
System, apparatus and method for providing a local clock signal for...
- Patent number 10,409,319
- Issue date Sep 10, 2019
- Intel Corporation
- Iqbal R. Rajwani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for segmenting a memory array
- Patent number 10,347,324
- Issue date Jul 9, 2019
- Intel Corporation
- Bhushan M. Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power switching circuitry including power-up control
- Patent number 10,333,379
- Issue date Jun 25, 2019
- Intel Corporation
- Suphachai Chai Sutanthavibul
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Reducing aging of register file keeper circuits
- Patent number 10,324,721
- Issue date Jun 18, 2019
- Intel Corporation
- Anupama A. Thaploo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive multibit bus for energy optimization
- Patent number 10,290,289
- Issue date May 14, 2019
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pulse triggered flip flop
- Patent number 10,158,346
- Issue date Dec 18, 2018
- Intel Corporation
- Bhushan M. Borole
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System, apparatus and method for segmenting a memory array
- Patent number 10,062,429
- Issue date Aug 28, 2018
- Intel Corporation
- Bhushan Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for data retention and supply noise mitigation using clamps
- Patent number 9,766,827
- Issue date Sep 19, 2017
- Intel Corporation
- Pascal A. Meinerzhagen
- G11 - INFORMATION STORAGE
Information Patent Grant
Assist circuit for memory
- Patent number 9,685,208
- Issue date Jun 20, 2017
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Assist circuit for memory
- Patent number 9,355,694
- Issue date May 31, 2016
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION
- Publication number 20220044656
- Publication date Feb 10, 2022
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DOUBLE EDGE TRIGGERED MUX-D SCAN FLIP-FLOP
- Publication number 20210194468
- Publication date Jun 24, 2021
- Intel Corporation
- Amit Agarwal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System, Apparatus And Method For Segmenting A Memory Array
- Publication number 20210065779
- Publication date Mar 4, 2021
- Intel Corporation
- Bhushan M. Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CURRENT STEERING LEVEL-SHIFTER
- Publication number 20200358443
- Publication date Nov 12, 2020
- Intel Corporation
- Andres Malavasi Mora
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION
- Publication number 20200160819
- Publication date May 21, 2020
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Providing A Local Clock Signal For...
- Publication number 20200019207
- Publication date Jan 16, 2020
- Intel Corporation
- Iqbal R. Rajwani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Segmenting A Memory Array
- Publication number 20190362772
- Publication date Nov 28, 2019
- Intel Corporation
- Bhushan M. Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION
- Publication number 20190266981
- Publication date Aug 29, 2019
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing Aging of Register File Keeper Circuits
- Publication number 20190213161
- Publication date Jul 11, 2019
- Intel Corporation
- Anupama A. Thaploo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pulse Triggered Flip Flop
- Publication number 20190109582
- Publication date Apr 11, 2019
- Intel Corporation
- Bhushan M. Borole
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System, Apparatus And Method For Segmenting A Memory Array
- Publication number 20190035452
- Publication date Jan 31, 2019
- Intel Corporation
- Bhushan M. Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Reducing Voltage Swing On An Inter...
- Publication number 20180301120
- Publication date Oct 18, 2018
- Anupama A. Thaploo
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Application
Reducing Aging of Register File Keeper Circuits
- Publication number 20180300137
- Publication date Oct 18, 2018
- Intel Corporation
- Anupama A. Thaploo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Providing A Local Clock Signal For...
- Publication number 20180299921
- Publication date Oct 18, 2018
- Iqbal R. Rajwani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pulse Triggered Flip Flop
- Publication number 20180302064
- Publication date Oct 18, 2018
- Intel Corporation
- Bhushan M. Borole
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION
- Publication number 20180286360
- Publication date Oct 4, 2018
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER SWITCHING CIRCUITRY INCLUDING POWER-UP CONTROL
- Publication number 20180175832
- Publication date Jun 21, 2018
- Suphachai Chai Sutanthavibul
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
APPARATUS FOR DATA RETENTION AND SUPPLY NOISE MITIGATION USING CLAMPS
- Publication number 20180024761
- Publication date Jan 25, 2018
- Intel Corporation
- Pascal A. MEINERZHAGEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASSIST CIRCUIT FOR MEMORY
- Publication number 20160225419
- Publication date Aug 4, 2016
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Application
ASSIST CIRCUIT FOR MEMORY
- Publication number 20150279438
- Publication date Oct 1, 2015
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE

Anupama Thaploo

Person

Patents Grantslast 30 patents

Adaptive multibit bus for energy optimization

Current steering level-shifter

System, apparatus and method for segmenting a memory array

Adaptive multibit bus for energy optimization

Double edge triggered Mux-D scan flip-flop

System, apparatus and method for providing a local clock signal for...

System, apparatus and method for segmenting a memory array

System, apparatus and method for reducing voltage swing on an inter...

Reducing aging of register file keeper circuits

Current steering level-shifter

Pulse triggered flip flop

Adaptive multibit bus for energy optimization

Apparatus for data retention and supply noise mitigation using clamps

Multi-bit pulsed latch including serial scan chain

System, apparatus and method for providing a local clock signal for...

System, apparatus and method for segmenting a memory array

Power switching circuitry including power-up control

Reducing aging of register file keeper circuits

Adaptive multibit bus for energy optimization

Pulse triggered flip flop

System, apparatus and method for segmenting a memory array

Apparatus for data retention and supply noise mitigation using clamps

Assist circuit for memory

Assist circuit for memory

Patents Applicationslast 30 patents

ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION

DOUBLE EDGE TRIGGERED MUX-D SCAN FLIP-FLOP

System, Apparatus And Method For Segmenting A Memory Array

CURRENT STEERING LEVEL-SHIFTER

ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION

System, Apparatus And Method For Providing A Local Clock Signal For...

System, Apparatus And Method For Segmenting A Memory Array

ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION

Reducing Aging of Register File Keeper Circuits

Pulse Triggered Flip Flop

System, Apparatus And Method For Segmenting A Memory Array

System, Apparatus And Method For Reducing Voltage Swing On An Inter...

Reducing Aging of Register File Keeper Circuits

System, Apparatus And Method For Providing A Local Clock Signal For...

Pulse Triggered Flip Flop

ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION

POWER SWITCHING CIRCUITRY INCLUDING POWER-UP CONTROL

APPARATUS FOR DATA RETENTION AND SUPPLY NOISE MITIGATION USING CLAMPS

ASSIST CIRCUIT FOR MEMORY

ASSIST CIRCUIT FOR MEMORY