ANURAG JINDAL

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Conductive interconnect structures incorporating negative thermal e...
- Patent number 11,011,420
- Issue date May 18, 2021
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect assemblies with through-silicon vias and stress-relief...
- Patent number 10,847,442
- Issue date Nov 24, 2020
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive interconnect structures incorporating negative thermal e...
- Patent number 10,546,777
- Issue date Jan 28, 2020
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive interconnect structures incorporating negative thermal e...
- Patent number 9,922,875
- Issue date Mar 20, 2018
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive interconnect structures incorporating negative thermal e...
- Patent number 9,754,825
- Issue date Sep 5, 2017
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Devices, systems and methods for manufacturing through-substrate vi...
- Patent number 9,627,295
- Issue date Apr 18, 2017
- Micron Technology, Inc.
- Anurag Jindal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit substrates comprising through-substrate vias and...
- Patent number 9,330,975
- Issue date May 3, 2016
- Micron Technology, Inc.
- Anurag Jindal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Devices, systems and methods for manufacturing through-substrate vi...
- Patent number 9,305,865
- Issue date Apr 5, 2016
- Micron Technology, Inc.
- Anurag Jindal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive interconnect structures incorporating negative thermal e...
- Patent number 9,099,442
- Issue date Aug 4, 2015
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of exposing conductive vias of semiconductor devices and as...
- Patent number 9,034,752
- Issue date May 19, 2015
- Micron Technology, Inc.
- Hongqi Li
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Devices, systems, and methods related to planarizing semiconductor...
- Patent number 8,956,974
- Issue date Feb 17, 2015
- Micron Technology, Inc.
- Wayne H. Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Post-tungsten CMP cleaning solution and method of using the same
- Patent number 8,911,558
- Issue date Dec 16, 2014
- Nanya Technology Corp.
- Hongqi Li
- C11 - ANIMAL AND VEGETABLE OILS, FATS, FATTY SUBSTANCES AND WAXES FATTY ACIDS...
Information Patent Grant
Process of planarizing a wafer with a large step height and/or surf...
- Patent number 8,871,103
- Issue date Oct 28, 2014
- Nanya Technology Corp.
- Brett Busch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-tiered semiconductor apparatuses including residual silicide...
- Patent number 8,872,252
- Issue date Oct 28, 2014
- Micron Technology, Inc.
- Anurag Jindal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of planarizing a wafer with a large step height and/or surf...
- Patent number 8,580,690
- Issue date Nov 12, 2013
- Nanya Technology Corp.
- Brett Busch
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND RE...
- Publication number 20210183697
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Hongqi Li
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Application
CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL E...
- Publication number 20200235007
- Publication date Jul 23, 2020
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL E...
- Publication number 20180174902
- Publication date Jun 21, 2018
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL E...
- Publication number 20170316974
- Publication date Nov 2, 2017
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES, SYSTEMS AND METHODS FOR MANUFACTURING THROUGH-SUBSTRATE VI...
- Publication number 20160190042
- Publication date Jun 30, 2016
- Micron Technology, Inc.
- Anurag Jindal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL E...
- Publication number 20150340282
- Publication date Nov 26, 2015
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT ASSEMBLIES WITH THROUGH-SILICON VIAS AND STRESS-RELIEF...
- Publication number 20150243583
- Publication date Aug 27, 2015
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES, SYSTEMS, AND METHODS RELATED TO PLANARIZING SEMICONDUCTOR...
- Publication number 20150206801
- Publication date Jul 23, 2015
- Micron Technology, Inc.
- Wayne H. Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND RE...
- Publication number 20150145146
- Publication date May 28, 2015
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES, SYSTEMS AND METHODS FOR MANUFACTURING THROUGH-SUBSTRATE VI...
- Publication number 20150115445
- Publication date Apr 30, 2015
- Micron Technology, Inc.
- Anurag Jindal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-TIERED SEMICONDUCTOR APPARATUSES INCLUDING RESIDUAL SILICIDE...
- Publication number 20150044860
- Publication date Feb 12, 2015
- Micron Technology, Inc.
- Anurag Jindal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL E...
- Publication number 20150035150
- Publication date Feb 5, 2015
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND AS...
- Publication number 20140183740
- Publication date Jul 3, 2014
- Micron Technology, Inc.
- Hongqi Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process of planarizing a wafer with a large step height and/or surf...
- Publication number 20140038414
- Publication date Feb 6, 2014
- NANYA TECHNOLOGY CORP.
- BRETT BUSCH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES, SYSTEMS, AND METHODS RELATED TO PLANARIZING SEMICONDUCTOR...
- Publication number 20140004698
- Publication date Jan 2, 2014
- Micron Technology, Inc.
- Wayne H. Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Substrates Comprising Through-Substrate Vias And...
- Publication number 20130320538
- Publication date Dec 5, 2013
- Micron Technology, Inc.
- Anurag Jindal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING A MULTI-TIERED SEMICONDUCTOR DEVICE AND APPARATU...
- Publication number 20130032870
- Publication date Feb 7, 2013
- Anurag Jindal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTION BARRIER MATERIAL DEVICE AND METHOD
- Publication number 20120315754
- Publication date Dec 13, 2012
- Micron Technology, Inc.
- Xiaoyun Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process of planarizing a wafer with a large step height and/or surf...
- Publication number 20120258596
- Publication date Oct 11, 2012
- BRETT BUSCH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POST-TUNGSTEN CMP CLEANING SOLUTION AND METHOD OF USING THE SAME
- Publication number 20120244705
- Publication date Sep 27, 2012
- Hongqi LI
- H01 - BASIC ELECTRIC ELEMENTS

ANURAG JINDAL

Person

Patents Grantslast 30 patents

Conductive interconnect structures incorporating negative thermal e...

Interconnect assemblies with through-silicon vias and stress-relief...

Conductive interconnect structures incorporating negative thermal e...

Conductive interconnect structures incorporating negative thermal e...

Conductive interconnect structures incorporating negative thermal e...

Devices, systems and methods for manufacturing through-substrate vi...

Integrated circuit substrates comprising through-substrate vias and...

Devices, systems and methods for manufacturing through-substrate vi...

Conductive interconnect structures incorporating negative thermal e...

Methods of exposing conductive vias of semiconductor devices and as...

Devices, systems, and methods related to planarizing semiconductor...

Post-tungsten CMP cleaning solution and method of using the same

Process of planarizing a wafer with a large step height and/or surf...

Multi-tiered semiconductor apparatuses including residual silicide...

Process of planarizing a wafer with a large step height and/or surf...

Patents Applicationslast 30 patents

METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND RE...

CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL E...

CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL E...

CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL E...

DEVICES, SYSTEMS AND METHODS FOR MANUFACTURING THROUGH-SUBSTRATE VI...

CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL E...

INTERCONNECT ASSEMBLIES WITH THROUGH-SILICON VIAS AND STRESS-RELIEF...

DEVICES, SYSTEMS, AND METHODS RELATED TO PLANARIZING SEMICONDUCTOR...

METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND RE...

DEVICES, SYSTEMS AND METHODS FOR MANUFACTURING THROUGH-SUBSTRATE VI...

MULTI-TIERED SEMICONDUCTOR APPARATUSES INCLUDING RESIDUAL SILICIDE...

CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL E...

METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND AS...

Process of planarizing a wafer with a large step height and/or surf...

DEVICES, SYSTEMS, AND METHODS RELATED TO PLANARIZING SEMICONDUCTOR...

Integrated Circuit Substrates Comprising Through-Substrate Vias And...

METHODS OF FORMING A MULTI-TIERED SEMICONDUCTOR DEVICE AND APPARATU...

INTERCONNECTION BARRIER MATERIAL DEVICE AND METHOD

Process of planarizing a wafer with a large step height and/or surf...

POST-TUNGSTEN CMP CLEANING SOLUTION AND METHOD OF USING THE SAME