Anurag Tomar

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and system for implementing pipeline flip-flops
- Patent number 9,262,359
- Issue date Feb 16, 2016
- Cadence Design Systems, Inc.
- David C. Noice
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flat placement of cells on non-integer multiple height rows in a di...
- Patent number 7,802,219
- Issue date Sep 21, 2010
- Cadence Design Systems, Inc.
- Anurag Tomar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FLAT PLACEMENT OF CELLS ON NON-INTEGER MULTIPLE HEIGHT ROWS IN A DI...
- Publication number 20080134118
- Publication date Jun 5, 2008
- Cadence Design Systems, Inc.
- Anurag Tomar
- G06 - COMPUTING CALCULATING COUNTING