Arash Hassibi

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Mountain View, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Automatic phase lock loop design using geometric programming
- Patent number 7,304,544
- Issue date Dec 4, 2007
- Sabio Labs, Inc.
- Dave Colleran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimal simultaneous design and floorplanning of integrated circuit
- Patent number 7,065,727
- Issue date Jun 20, 2006
- Barcelona Design, Inc.
- Mar Hershenson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for automatic analog/mixed signal system desig...
- Patent number 6,954,921
- Issue date Oct 11, 2005
- Barcelona Design, Inc.
- Arash Hassibi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for routing an integrated circuit
- Patent number 6,877,148
- Issue date Apr 5, 2005
- Barcelona Design, Inc.
- Arash Hassibi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR AUTOMATIC ANALOG/MIXED SIGNAL SYSTEM DESIG...
- Publication number 20040172609
- Publication date Sep 2, 2004
- Arash Hassibi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automatic phase lock loop design using geometric programming
- Publication number 20040027206
- Publication date Feb 12, 2004
- Dave Colleran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Behavioral circuit modeling for geometric programming
- Publication number 20030191611
- Publication date Oct 9, 2003
- Maria del Mar Hershenson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimal simultaneous design and floorplanning of integrated circuit
- Publication number 20020184603
- Publication date Dec 5, 2002
- Arash Hassibi
- G06 - COMPUTING CALCULATING COUNTING