ARAVINDH V. ANANTARAMAN

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for synchronization of multi-thread lanes
- Patent number 12,223,353
- Issue date Feb 11, 2025
- Intel Corporation
- Valentin Andrei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor data access and sharing
- Patent number 12,204,487
- Issue date Jan 21, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,182,062
- Issue date Dec 31, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for cache optimization
- Patent number 12,182,035
- Issue date Dec 31, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,153,541
- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses, methods, and systems for dynamic bypassing of last lev...
- Patent number 12,130,739
- Issue date Oct 29, 2024
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for cache optimization
- Patent number 12,124,383
- Issue date Oct 22, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 12,117,962
- Issue date Oct 15, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,099,461
- Issue date Sep 24, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression techniques
- Patent number 12,093,210
- Issue date Sep 17, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,066,975
- Issue date Aug 20, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for cache optimization
- Patent number 12,056,059
- Issue date Aug 6, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient data sharing for graphics data processing operations
- Patent number 12,032,496
- Issue date Jul 9, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile architecture for graphics operations
- Patent number 12,013,808
- Issue date Jun 18, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management for detecting cross tile access provid...
- Patent number 11,995,029
- Issue date May 28, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Assistance for hardware prefetch in cache access
- Patent number 11,934,342
- Issue date Mar 19, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction based control of memory attributes
- Patent number 11,899,614
- Issue date Feb 13, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data prefetching for graphics data processing
- Patent number 11,892,950
- Issue date Feb 6, 2024
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for exploiting queues and transitional storage...
- Patent number 11,869,113
- Issue date Jan 9, 2024
- Intel Corporation
- Aravindh Anantaraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory prefetching in multiple GPU environment
- Patent number 11,861,759
- Issue date Jan 2, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for synchronization of multi-thread lanes
- Patent number 11,816,500
- Issue date Nov 14, 2023
- Intel Corporation
- Valentin Andrei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Local memory sharing between kernels
- Patent number 11,809,905
- Issue date Nov 7, 2023
- Intel Corporation
- Valentin Andrei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 11,762,804
- Issue date Sep 19, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient data sharing for graphics data processing operations
- Patent number 11,755,501
- Issue date Sep 12, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bias-based coherency in an interconnect fabric
- Patent number 11,663,135
- Issue date May 30, 2023
- Intel Corporation
- Ritu Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 11,620,256
- Issue date Apr 4, 2023
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics systems and methods for accelerating synchronization using...
- Patent number 11,561,828
- Issue date Jan 24, 2023
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preemptive page fault handling
- Patent number 11,416,411
- Issue date Aug 16, 2022
- Intel Corporation
- Murali Ramadoss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 11,409,693
- Issue date Aug 9, 2022
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
- Publication number 20250004981
- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20240411717
- Publication date Dec 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION TECHNIQUES
- Publication number 20240403259
- Publication date Dec 5, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT DATA SHARING FOR GRAPHICS DATA PROCESSING OPERATIONS
- Publication number 20240385975
- Publication date Nov 21, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20240256483
- Publication date Aug 1, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PREFETCHING FOR GRAPHICS DATA PROCESSING
- Publication number 20240256456
- Publication date Aug 1, 2024
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCALLY BIASED CACHE REPLACEMENT FOR CLUSTERED CACHE ARCHITECTURE
- Publication number 20240220420
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REMOTE ATOMIC OPERATIONS FOR CLUSTERED PROCESSING ARCHITECTURE
- Publication number 20240211258
- Publication date Jun 27, 2024
- Intel Corporation
- Yuvraj Dhillon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATING A MEMORY SIDE CACHE DATA ARRAY AND CACHE CONTROLLER
- Publication number 20240211400
- Publication date Jun 27, 2024
- Intel Corporation
- Israel Diamand
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR EXPLOITING QUEUES AND TRANSITIONAL STORAGE...
- Publication number 20240169466
- Publication date May 23, 2024
- Intel Corporation
- Aravindh Anantaraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY PREFETCHING IN MULTIPLE GPU ENVIRONMENT
- Publication number 20240161226
- Publication date May 16, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR SYNCHRONIZATION OF MULTI-THREAD LANES
- Publication number 20240103910
- Publication date Mar 28, 2024
- Intel Corporation
- Valentin Andrei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU...
- Publication number 20240086357
- Publication date Mar 14, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES
- Publication number 20240086356
- Publication date Mar 14, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALAR CORE INTEGRATION
- Publication number 20240045830
- Publication date Feb 8, 2024
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT DATA SHARING FOR GRAPHICS DATA PROCESSING OPERATIONS
- Publication number 20240012767
- Publication date Jan 11, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-RENDER PARTITIONING
- Publication number 20230298125
- Publication date Sep 21, 2023
- Intel Corporation
- Hema Chand Nalluri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARD PARTITIONING VIA INTRA-SOC COMPOSITION
- Publication number 20230297421
- Publication date Sep 21, 2023
- Intel Corporation
- David Cowperthwaite
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE PARTITIONING OF GPU RESOURCES
- Publication number 20230297440
- Publication date Sep 21, 2023
- Intel Corporation
- David Cowperthwaite
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD GROUP DISPATCH IN A CLUSTERED GRAPHICS ARCHITECTURE
- Publication number 20230205587
- Publication date Jun 29, 2023
- Intel Corporation
- Zamshed Iqbal Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC HANDLING FOR DISAGGREGATED 3D STRUCTURED SOCS
- Publication number 20230114164
- Publication date Apr 13, 2023
- Intel Corporation
- Rahul Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PREFETCHING FOR GRAPHICS DATA PROCESSING
- Publication number 20230051190
- Publication date Feb 16, 2023
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALAR CORE INTEGRATION
- Publication number 20230029176
- Publication date Jan 26, 2023
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES
- Publication number 20230014565
- Publication date Jan 19, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR CACHE OPTIMIZATION
- Publication number 20220350751
- Publication date Nov 3, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
- Publication number 20220261347
- Publication date Aug 18, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY PREFETCHING IN MULTIPLE GPU ENVIRONMENT
- Publication number 20220222767
- Publication date Jul 14, 2022
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
- Publication number 20220179787
- Publication date Jun 9, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING

ARAVINDH V. ANANTARAMAN

Person

Patents Grantslast 30 patents

Systems and methods for synchronization of multi-thread lanes

Systems and methods for improving cache efficiency and utilization

Graphics processor data access and sharing

Multi-tile memory management

Systems and methods for cache optimization

Cache structure and utilization

Apparatuses, methods, and systems for dynamic bypassing of last lev...

Systems and methods for cache optimization

Scalar core integration

Multi-tile memory management

Compression techniques

Cache structure and utilization

Systems and methods for cache optimization

Efficient data sharing for graphics data processing operations

Multi-tile architecture for graphics operations

Multi-tile memory management for detecting cross tile access provid...

Assistance for hardware prefetch in cache access

Instruction based control of memory attributes

Data prefetching for graphics data processing

Systems and methods for exploiting queues and transitional storage...

Memory prefetching in multiple GPU environment

Systems and methods for synchronization of multi-thread lanes

Local memory sharing between kernels

Scalar core integration

Efficient data sharing for graphics data processing operations

Bias-based coherency in an interconnect fabric

Systems and methods for improving cache efficiency and utilization

Graphics systems and methods for accelerating synchronization using...

Preemptive page fault handling

Scalar core integration

Patents Applicationslast 30 patents

MULTI-TILE MEMORY MANAGEMENT

CACHE STRUCTURE AND UTILIZATION

COMPRESSION TECHNIQUES

EFFICIENT DATA SHARING FOR GRAPHICS DATA PROCESSING OPERATIONS

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

LOCALLY BIASED CACHE REPLACEMENT FOR CLUSTERED CACHE ARCHITECTURE

REMOTE ATOMIC OPERATIONS FOR CLUSTERED PROCESSING ARCHITECTURE

DISAGGREGATING A MEMORY SIDE CACHE DATA ARRAY AND CACHE CONTROLLER

SYSTEMS AND METHODS FOR EXPLOITING QUEUES AND TRANSITIONAL STORAGE...

MEMORY PREFETCHING IN MULTIPLE GPU ENVIRONMENT

SYSTEMS AND METHODS FOR SYNCHRONIZATION OF MULTI-THREAD LANES

SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU...

INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES

SCALAR CORE INTEGRATION

EFFICIENT DATA SHARING FOR GRAPHICS DATA PROCESSING OPERATIONS

MULTI-RENDER PARTITIONING

HARD PARTITIONING VIA INTRA-SOC COMPOSITION

FLEXIBLE PARTITIONING OF GPU RESOURCES

THREAD GROUP DISPATCH IN A CLUSTERED GRAPHICS ARCHITECTURE

ATOMIC HANDLING FOR DISAGGREGATED 3D STRUCTURED SOCS

DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

SCALAR CORE INTEGRATION

INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES

SYSTEMS AND METHODS FOR CACHE OPTIMIZATION

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

MEMORY PREFETCHING IN MULTIPLE GPU ENVIRONMENT

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION