Arch D. Robison

Person

Champaign, IL, US

People

Patents Grantslast 30 patents

Information Patent Grant
Instructions and logic to provide atomic range modification operations
- Patent number 10,528,345
- Issue date Jan 7, 2020
- Intel Corporation
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for fast synchronization barriers for many-core proces...
- Patent number 9,760,410
- Issue date Sep 12, 2017
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
User-level fork and join processors, methods, systems, and instruct...
- Patent number 9,747,108
- Issue date Aug 29, 2017
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for low-level composable high performance computing li...
- Patent number 9,690,552
- Issue date Jun 27, 2017
- Intel Corporation
- Hongbo Rong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system of compiling program code into predicated instruc...
- Patent number 9,507,594
- Issue date Nov 29, 2016
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for efficient synchronization barriers with work steal...
- Patent number 9,348,658
- Issue date May 24, 2016
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fair scalable reader-writer mutual exclusion
- Patent number 8,707,324
- Issue date Apr 22, 2014
- Intel Corporation
- Alexey Kukanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advance trip count computation in a concurrent processing environment
- Patent number 8,468,509
- Issue date Jun 18, 2013
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fair scalable reader-writer mutual exclusion
- Patent number 8,127,303
- Issue date Feb 28, 2012
- Intel Corporation
- Alexey Kukanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preserving hardware thread cache affinity via procrastination
- Patent number 8,108,867
- Issue date Jan 31, 2012
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fair scalable reader-writer mutual exclusion
- Patent number 7,730,491
- Issue date Jun 1, 2010
- Intel Corporation
- Alexey Kukanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast tree-based generation of a dependence graph
- Patent number 7,624,386
- Issue date Nov 24, 2009
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to reduce the size of source code in a processing...
- Patent number 7,257,808
- Issue date Aug 14, 2007
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Run-time behavior preserving partial redundancy elimination
- Patent number 7,213,242
- Issue date May 1, 2007
- Intel Corporation
- Arch Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pruning local graphs in an inter-procedural analysis solver
- Patent number 7,165,245
- Issue date Jan 16, 2007
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data-flow method for optimizing exception-handling instructions in...
- Patent number 7,120,904
- Issue date Oct 10, 2006
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for interprocedural side effect analysis
- Patent number 7,062,759
- Issue date Jun 13, 2006
- Intel Corporation
- Arch Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for interprocedural analysis with separate compil...
- Patent number 6,820,253
- Issue date Nov 16, 2004
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data-flow method of analyzing definitions and uses of L values in p...
- Patent number 6,370,685
- Issue date Apr 9, 2002
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method inside an optimizing compiler for analyzing assertions and r...
- Patent number 5,805,894
- Issue date Sep 8, 1998
- Kuck & Associates, Inc.
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of analyzing definitions and uses in programs with pointers...
- Patent number 5,790,866
- Issue date Aug 4, 1998
- Kuck & Associates, Inc.
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of replacing lvalues by variables in programs containing nes...
- Patent number 5,710,927
- Issue date Jan 20, 1998
- Kuck & Associates, Inc.
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INSTRUCTIONS AND LOGIC TO PROVIDE ATOMIC RANGE OPERATIONS
- Publication number 20160283237
- Publication date Sep 29, 2016
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USER-LEVEL FORK AND JOIN PROCESSORS, METHODS, SYSTEMS, AND INSTRUCT...
- Publication number 20160283245
- Publication date Sep 29, 2016
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR FAST SYNCHRONIZATION BARRIERS FOR MANY-CORE PROCES...
- Publication number 20160170813
- Publication date Jun 16, 2016
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR EFFICIENT SYNCHRONIZATION BARRIERS WITH WORK STEAL...
- Publication number 20160170812
- Publication date Jun 16, 2016
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system of compiling program code into predicated instruc...
- Publication number 20150012729
- Publication date Jan 8, 2015
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAIR SCALABLE READER-WRITER MUTUAL EXCLUSION
- Publication number 20120198471
- Publication date Aug 2, 2012
- Alexey Kukanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAIR SCALABLE READER-WRITER MUTUAL EXCLUSION
- Publication number 20100293553
- Publication date Nov 18, 2010
- Alexey Kukanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preserving hardware thread cache affinity via procrastination
- Publication number 20090320040
- Publication date Dec 24, 2009
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADVANCE TRIP COUNT COMPUTATION IN A CONCURRENT PROCESSING ENVIRONMENT
- Publication number 20090248776
- Publication date Oct 1, 2009
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Device, system, and method for regulating software lock elision mec...
- Publication number 20090125519
- Publication date May 14, 2009
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Lockless scheduling of decreasing chunks of a loop in a parallel pr...
- Publication number 20070094652
- Publication date Apr 26, 2007
- Joshua J. Chia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fair scalable reader-writer mutual exclusion
- Publication number 20070067774
- Publication date Mar 22, 2007
- Alexey Kukanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fast tree-based generation of a dependence graph
- Publication number 20060136468
- Publication date Jun 22, 2006
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system of achieving integer division by invariant diviso...
- Publication number 20050289209
- Publication date Dec 29, 2005
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scheduling of instructions in program compilation
- Publication number 20050289530
- Publication date Dec 29, 2005
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data-flow method for optimizing exception-handling instructions in...
- Publication number 20040243982
- Publication date Dec 2, 2004
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Run-time behavior preserving partial redundancy elimination
- Publication number 20040128659
- Publication date Jul 1, 2004
- Intel Corporation
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for interprocedural side effect analysis
- Publication number 20040015903
- Publication date Jan 22, 2004
- Arch Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method to reduce the size of executable code in a proces...
- Publication number 20030131344
- Publication date Jul 10, 2003
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for alias analysis for restricted pointers
- Publication number 20030074655
- Publication date Apr 17, 2003
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pruning local graphs in an inter-procedural analysis solver
- Publication number 20020162096
- Publication date Oct 31, 2002
- Arch D. Robison
- G06 - COMPUTING CALCULATING COUNTING

Arch D. Robison

Person

Patents Grantslast 30 patents

Instructions and logic to provide atomic range modification operations

Technologies for fast synchronization barriers for many-core proces...

User-level fork and join processors, methods, systems, and instruct...

Technologies for low-level composable high performance computing li...

Method and system of compiling program code into predicated instruc...

Technologies for efficient synchronization barriers with work steal...

Fair scalable reader-writer mutual exclusion

Advance trip count computation in a concurrent processing environment

Fair scalable reader-writer mutual exclusion

Preserving hardware thread cache affinity via procrastination

Fair scalable reader-writer mutual exclusion

Fast tree-based generation of a dependence graph

System and method to reduce the size of source code in a processing...

Run-time behavior preserving partial redundancy elimination

Pruning local graphs in an inter-procedural analysis solver

Data-flow method for optimizing exception-handling instructions in...

Method and system for interprocedural side effect analysis

Method and system for interprocedural analysis with separate compil...

Data-flow method of analyzing definitions and uses of L values in p...

Method inside an optimizing compiler for analyzing assertions and r...

Method of analyzing definitions and uses in programs with pointers...

Method of replacing lvalues by variables in programs containing nes...

Patents Applicationslast 30 patents

INSTRUCTIONS AND LOGIC TO PROVIDE ATOMIC RANGE OPERATIONS

USER-LEVEL FORK AND JOIN PROCESSORS, METHODS, SYSTEMS, AND INSTRUCT...

TECHNOLOGIES FOR FAST SYNCHRONIZATION BARRIERS FOR MANY-CORE PROCES...

TECHNOLOGIES FOR EFFICIENT SYNCHRONIZATION BARRIERS WITH WORK STEAL...

Method and system of compiling program code into predicated instruc...

FAIR SCALABLE READER-WRITER MUTUAL EXCLUSION

FAIR SCALABLE READER-WRITER MUTUAL EXCLUSION

Preserving hardware thread cache affinity via procrastination

ADVANCE TRIP COUNT COMPUTATION IN A CONCURRENT PROCESSING ENVIRONMENT

Device, system, and method for regulating software lock elision mec...

Lockless scheduling of decreasing chunks of a loop in a parallel pr...

Fair scalable reader-writer mutual exclusion

Fast tree-based generation of a dependence graph

Method and system of achieving integer division by invariant diviso...

Scheduling of instructions in program compilation

Data-flow method for optimizing exception-handling instructions in...

Run-time behavior preserving partial redundancy elimination

Method and system for interprocedural side effect analysis

System and method to reduce the size of executable code in a proces...

Method and apparatus for alias analysis for restricted pointers

Pruning local graphs in an inter-procedural analysis solver