Archana Tankasala

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Santa Clara, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Dynamic gate steps for last-level programming to improve write perf...
- Patent number 12,211,563
- Issue date Jan 28, 2025
- Intel Corportaion
- Sagar Upadhyay
- G11 - INFORMATION STORAGE
Information Patent Grant
Skip program verify for dynamic start voltage sampling
- Patent number 12,189,955
- Issue date Jan 7, 2025
- INTEL NDTM US LLC
- Archana Tankasala
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SKIP PROGRAM VERIFY FOR DYNAMIC START VOLTAGE SAMPLING
- Publication number 20230161478
- Publication date May 25, 2023
- Intel NDTM US LLC
- Archana TANKASALA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC GATE STEPS FOR LAST-LEVEL PROGRAMMING TO IMPROVE WRITE PERF...
- Publication number 20230061293
- Publication date Mar 2, 2023
- Intel Corporation
- Sagar Upadhyay
- G11 - INFORMATION STORAGE