Aritome Seiichi

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Program and read trim setting
- Patent number 9,042,178
- Issue date May 26, 2015
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices having reduced interference between floating gates a...
- Patent number 9,018,059
- Issue date Apr 28, 2015
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing read failure in a memory device
- Patent number 8,891,309
- Issue date Nov 18, 2014
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices comprising word line structures, at least one select...
- Patent number 8,729,621
- Issue date May 20, 2014
- Micron Technology, Inc.
- Kirk D. Prall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
NAND flash memory programming
- Patent number 8,717,819
- Issue date May 6, 2014
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Couplings within memory devices
- Patent number 8,693,231
- Issue date Apr 8, 2014
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Grant
Transistor constructions and processing methods
- Patent number 8,618,597
- Issue date Dec 31, 2013
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory devices and methods of forming memory devices
- Patent number 8,580,645
- Issue date Nov 12, 2013
- Micron Technology, Inc.
- Kirk D. Prall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device transistors
- Patent number 8,536,634
- Issue date Sep 17, 2013
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method, apparatus, and system for improved read operation in memory
- Patent number 8,467,248
- Issue date Jun 18, 2013
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device capable of reducing floating gate-to-flo...
- Patent number 8,462,548
- Issue date Jun 11, 2013
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices having reduced interference between floating gates a...
- Patent number 8,441,058
- Issue date May 14, 2013
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory devices and methods of forming memory devices
- Patent number 8,415,223
- Issue date Apr 9, 2013
- Micron Technology, Inc.
- Kirk D. Prall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor constructions and processing methods
- Patent number 8,338,879
- Issue date Dec 25, 2012
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selecting programming voltages in response to at least a data latch...
- Patent number 8,339,858
- Issue date Dec 25, 2012
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing effects of program disturb in a memory device
- Patent number 8,325,520
- Issue date Dec 4, 2012
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND flash memory programming
- Patent number 8,223,549
- Issue date Jul 17, 2012
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Couplings within memory devices
- Patent number 8,208,278
- Issue date Jun 26, 2012
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Grant
Interconnecting bit lines in memory devices for multiplexing
- Patent number 8,193,590
- Issue date Jun 5, 2012
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Fabrication of finned memory arrays
- Patent number 8,163,610
- Issue date Apr 24, 2012
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing effects of program disturb in a memory device
- Patent number 8,159,879
- Issue date Apr 17, 2012
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming a flash memory device
- Patent number 8,144,519
- Issue date Mar 27, 2012
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of forming memory devices by performing halogen ion implanta...
- Patent number 8,129,781
- Issue date Mar 6, 2012
- Micron Technology, Inc.
- Kirk D Prall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing read failure in a memory device
- Patent number 8,059,474
- Issue date Nov 15, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory page boosting method, device and system
- Patent number 8,050,090
- Issue date Nov 1, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming method to reduce gate coupling interference for non-vol...
- Patent number 8,050,096
- Issue date Nov 1, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing effects of program disturb in a memory device
- Patent number 8,023,329
- Issue date Sep 20, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device transistors
- Patent number 8,004,031
- Issue date Aug 23, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor constructions and processing methods
- Patent number 7,989,288
- Issue date Aug 2, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory devices having reduced interference between floating gates a...
- Patent number 7,977,190
- Issue date Jul 12, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Flash Memory Cells, NAND Cell Units, Methods of Forming NAND Cell U...
- Publication number 20140254265
- Publication date Sep 11, 2014
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Devices Comprising Word Line Structures, At Least One Select...
- Publication number 20140035021
- Publication date Feb 6, 2014
- Micron Technology, Inc.
- Kirk D. Prall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICES HAVING REDUCED INTERFERENCE BETWEEN FLOATING GATES A...
- Publication number 20130237031
- Publication date Sep 12, 2013
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory Devices and Methods of Forming Memory Devices
- Publication number 20130193505
- Publication date Aug 1, 2013
- Micron Technology, Inc.
- Kirk D. Prall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor Constructions and Processing Methods
- Publication number 20130009233
- Publication date Jan 10, 2013
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTOSENSITIVE COMPOSITION AND COMPOUND FOR USE IN THE PHOTOSENESIT...
- Publication number 20120275227
- Publication date Nov 1, 2012
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
COUPLINGS WITHIN MEMORY DEVICES
- Publication number 20120258574
- Publication date Oct 11, 2012
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE
- Publication number 20120176838
- Publication date Jul 12, 2012
- Micron Tecnology, Inc.
- Seiichi ARITOME
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Devices And Methods Of Forming Memory Devices
- Publication number 20120132979
- Publication date May 31, 2012
- Micron Technology, Inc.
- Kirk Prall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Selecting programming voltages in response to at least a data latch...
- Publication number 20120113722
- Publication date May 10, 2012
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING READ FAILURE IN A MEMORY DEVICE
- Publication number 20120051139
- Publication date Mar 1, 2012
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE TRANSISTORS
- Publication number 20110298035
- Publication date Dec 8, 2011
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICES HAVING REDUCED INTERFERENCE BETWEEN FLOATING GATES A...
- Publication number 20110266610
- Publication date Nov 3, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor Constructions and Processing Methods
- Publication number 20110260236
- Publication date Oct 27, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROGRAM AND READ TRIM SETTING
- Publication number 20110242897
- Publication date Oct 6, 2011
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
INTERCONNECTING BIT LINES IN MEMORY DEVICES FOR MULTIPLEXING
- Publication number 20110233686
- Publication date Sep 29, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FABRICATION OF FINNED MEMORY ARRAYS
- Publication number 20110230033
- Publication date Sep 22, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PROGRAMMING A NON-VOLATILE MEMORY DEVICE TO REDUCE FLOAT...
- Publication number 20110222352
- Publication date Sep 15, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR IMPROVED READ OPERATION IN MEMORY
- Publication number 20110149658
- Publication date Jun 23, 2011
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE
- Publication number 20110122689
- Publication date May 26, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCTION OF PUNCH-THROUGH DISTURB DURING PROGRAMMING OF A MEMORY D...
- Publication number 20110116311
- Publication date May 19, 2011
- Micron Technology, Inc.
- Alessandro Torsi
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING A FLASH MEMORY DEVICE
- Publication number 20110096597
- Publication date Apr 28, 2011
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
Method of Forming Memory Devices by Performing Halogen Ion Implanta...
- Publication number 20110013463
- Publication date Jan 20, 2011
- Micron Technology, Inc.
- Kirk Prall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINNED MEMORY CELLS
- Publication number 20100320523
- Publication date Dec 23, 2010
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor Constructions and Processing Methods
- Publication number 20100291766
- Publication date Nov 18, 2010
- Micron Technology, Inc.
- Seiichi Aritome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY PAGE BOOSTING METHOD, DEVICE AND SYSTEM
- Publication number 20100232222
- Publication date Sep 16, 2010
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE
- Publication number 20100202210
- Publication date Aug 12, 2010
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING METHOD TO REDUCE GATE COUPLING INTERFERENCE FOR NON-VOL...
- Publication number 20100142268
- Publication date Jun 10, 2010
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING READ FAILURE IN A MEMORY DEVICE
- Publication number 20100142285
- Publication date Jun 10, 2010
- Micron Technology, Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Application
COUPLINGS WITHIN MEMORY DEVICES
- Publication number 20100091544
- Publication date Apr 15, 2010
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE

Aritome Seiichi

Person

Patents Grantslast 30 patents

Program and read trim setting

Memory devices having reduced interference between floating gates a...

Reducing read failure in a memory device

Memory devices comprising word line structures, at least one select...

NAND flash memory programming

Couplings within memory devices

Transistor constructions and processing methods

Memory devices and methods of forming memory devices

Memory device transistors

Method, apparatus, and system for improved read operation in memory

Non-volatile memory device capable of reducing floating gate-to-flo...

Memory devices having reduced interference between floating gates a...

Memory devices and methods of forming memory devices

Transistor constructions and processing methods

Selecting programming voltages in response to at least a data latch...

Reducing effects of program disturb in a memory device

NAND flash memory programming

Couplings within memory devices

Interconnecting bit lines in memory devices for multiplexing

Fabrication of finned memory arrays

Reducing effects of program disturb in a memory device

Programming a flash memory device

Method of forming memory devices by performing halogen ion implanta...

Reducing read failure in a memory device

Memory page boosting method, device and system

Programming method to reduce gate coupling interference for non-vol...

Reducing effects of program disturb in a memory device

Memory device transistors

Transistor constructions and processing methods

Memory devices having reduced interference between floating gates a...

Patents Applicationslast 30 patents

Flash Memory Cells, NAND Cell Units, Methods of Forming NAND Cell U...

Memory Devices Comprising Word Line Structures, At Least One Select...

MEMORY DEVICES HAVING REDUCED INTERFERENCE BETWEEN FLOATING GATES A...

Memory Devices and Methods of Forming Memory Devices

Transistor Constructions and Processing Methods

PHOTOSENSITIVE COMPOSITION AND COMPOUND FOR USE IN THE PHOTOSENESIT...

COUPLINGS WITHIN MEMORY DEVICES

REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE

Memory Devices And Methods Of Forming Memory Devices

Selecting programming voltages in response to at least a data latch...

REDUCING READ FAILURE IN A MEMORY DEVICE

MEMORY DEVICE TRANSISTORS

MEMORY DEVICES HAVING REDUCED INTERFERENCE BETWEEN FLOATING GATES A...

Transistor Constructions and Processing Methods

PROGRAM AND READ TRIM SETTING

INTERCONNECTING BIT LINES IN MEMORY DEVICES FOR MULTIPLEXING

FABRICATION OF FINNED MEMORY ARRAYS

METHOD FOR PROGRAMMING A NON-VOLATILE MEMORY DEVICE TO REDUCE FLOAT...

METHOD, APPARATUS, AND SYSTEM FOR IMPROVED READ OPERATION IN MEMORY

REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE

REDUCTION OF PUNCH-THROUGH DISTURB DURING PROGRAMMING OF A MEMORY D...

PROGRAMMING A FLASH MEMORY DEVICE

Method of Forming Memory Devices by Performing Halogen Ion Implanta...

FINNED MEMORY CELLS

Transistor Constructions and Processing Methods

MEMORY PAGE BOOSTING METHOD, DEVICE AND SYSTEM

REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE

PROGRAMMING METHOD TO REDUCE GATE COUPLING INTERFERENCE FOR NON-VOL...

REDUCING READ FAILURE IN A MEMORY DEVICE

COUPLINGS WITHIN MEMORY DEVICES