Arnab KHAWAS

Person

Bengaluru, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Clock gating circuits and methods for dual-edge-triggered applications
- Patent number 12,146,912
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Arnab Khawas
- G01 - MEASURING TESTING
Information Patent Grant
Hold time improved low area flip-flop architecture
- Patent number 11,946,973
- Issue date Apr 2, 2024
- Texas Instruments Incorporated
- Arnab Khawas
- G01 - MEASURING TESTING
Information Patent Grant
Flip-flop with internal circuit for generating inflated low and hig...
- Patent number 11,916,555
- Issue date Feb 27, 2024
- Texas Instruments Incorporated
- Arnab Khawas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reduced area, reduced power flip-flop
- Patent number 11,509,294
- Issue date Nov 22, 2022
- Texas Instruments Incorporated
- Badarish Mohan Subbannavar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reduced area, reduced power flip-flop
- Patent number 11,043,937
- Issue date Jun 22, 2021
- Texas Instruments Incorporated
- Badarish Mohan Subbannavar
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS
- Publication number 20250027995
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Arnab Khawas
- G01 - MEASURING TESTING
Information Patent Application
CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS
- Publication number 20240361384
- Publication date Oct 31, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Arnab Khawas
- G01 - MEASURING TESTING
Information Patent Application
HOLD TIME IMPROVED LOW AREA FLIP-FLOP ARCHITECTURE
- Publication number 20240210472
- Publication date Jun 27, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Arnab Khawas
- G01 - MEASURING TESTING
Information Patent Application
FLIP-FLOP WITH INTERNAL CIRCUIT FOR GENERATING INFLATED LOW AND HIG...
- Publication number 20230100019
- Publication date Mar 30, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Arnab Khawas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPACT, HIGH PERFORMANCE FULL ADDERS
- Publication number 20220342634
- Publication date Oct 27, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Arnab Khawas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED AREA, REDUCED POWER FLIP-FLOP
- Publication number 20210265985
- Publication date Aug 26, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Badarish Mohan SUBBANNAVAR
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REDUCED AREA, REDUCED POWER FLIP-FLOP
- Publication number 20210184659
- Publication date Jun 17, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Badarish Mohan SUBBANNAVAR
- H03 - BASIC ELECTRONIC CIRCUITRY

Arnab KHAWAS

Person

Patents Grantslast 30 patents

Clock gating circuits and methods for dual-edge-triggered applications

Hold time improved low area flip-flop architecture

Flip-flop with internal circuit for generating inflated low and hig...

Reduced area, reduced power flip-flop

Reduced area, reduced power flip-flop

Patents Applicationslast 30 patents

CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS

CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS

HOLD TIME IMPROVED LOW AREA FLIP-FLOP ARCHITECTURE

FLIP-FLOP WITH INTERNAL CIRCUIT FOR GENERATING INFLATED LOW AND HIG...

COMPACT, HIGH PERFORMANCE FULL ADDERS

REDUCED AREA, REDUCED POWER FLIP-FLOP

REDUCED AREA, REDUCED POWER FLIP-FLOP