Arnel Senosa Trasporto

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of forming PIP with inner known goo...
- Patent number RE47923
- Issue date Mar 31, 2020
- STATS ChipPAC Pte. Ltd.
- Zigmund R. Camacho
Information Patent Grant
Semiconductor device and method of forming a package in-fan out pac...
- Patent number 10,068,862
- Issue date Sep 4, 2018
- STATS ChipPAC Pte. Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with a grid array with a leadfr...
- Patent number 9,799,589
- Issue date Oct 24, 2017
- STATS ChipPAC Pte. Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with unplated leadframe and met...
- Patent number 9,620,480
- Issue date Apr 11, 2017
- STATS ChipPAC Pte. Ltd.
- Garret Dimaculangan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with routable trace and method...
- Patent number 9,576,873
- Issue date Feb 21, 2017
- STATS ChipPAC Pte. Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with optical sensor and method of forming inte...
- Patent number 9,525,080
- Issue date Dec 20, 2016
- STATS ChipPAC Pte. Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming base substrate with rece...
- Patent number 9,449,932
- Issue date Sep 20, 2016
- STATS ChipPAC Pte. Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optical semiconductor device having pre-molded leadframe with windo...
- Patent number 9,397,236
- Issue date Jul 19, 2016
- STATS ChipPAC Pte. Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of using substrate with conductive...
- Patent number 9,368,423
- Issue date Jun 14, 2016
- STATS ChipPAC Pte. Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with transferable trace lead frame
- Patent number 9,324,584
- Issue date Apr 26, 2016
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with external interconnect and...
- Patent number 9,324,641
- Issue date Apr 26, 2016
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with terminals and method of ma...
- Patent number 9,312,194
- Issue date Apr 12, 2016
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with electrical interface and m...
- Patent number 9,305,873
- Issue date Apr 5, 2016
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with routed circuit lead array...
- Patent number 9,299,644
- Issue date Mar 29, 2016
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with planarity control and meth...
- Patent number 9,293,351
- Issue date Mar 22, 2016
- Stats Chippac Ltd.
- Byung Tai Do
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Integrated circuit packaging system with terminals and method of ma...
- Patent number 9,219,029
- Issue date Dec 22, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with leadframe and method of ma...
- Patent number 9,190,349
- Issue date Nov 17, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with trace protection layer and...
- Patent number 9,177,897
- Issue date Nov 3, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with fiber-less substrate and m...
- Patent number 9,147,662
- Issue date Sep 29, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Coreless integrated circuit packaging system and method of manufact...
- Patent number 9,142,530
- Issue date Sep 22, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadframe system with warp control mechanism and method of manufact...
- Patent number 9,123,712
- Issue date Sep 1, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit packaging system with routable traces and method...
- Patent number 9,105,620
- Issue date Aug 11, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with molded grid-array mechanis...
- Patent number 8,987,064
- Issue date Mar 24, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with thermal structures and met...
- Patent number 8,963,320
- Issue date Feb 24, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with thermal emission and metho...
- Patent number 8,957,509
- Issue date Feb 17, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with trenched leadframe and met...
- Patent number 8,937,379
- Issue date Jan 20, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with optical sensor and method of forming inte...
- Patent number 8,866,248
- Issue date Oct 21, 2014
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with leadframe lead array routi...
- Patent number 8,841,173
- Issue date Sep 23, 2014
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with island terminals and metho...
- Patent number 8,802,501
- Issue date Aug 12, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with routable circuitry and met...
- Patent number 8,791,556
- Issue date Jul 29, 2014
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Forming a Package In-Fan Out Pac...
- Publication number 20160300817
- Publication date Oct 13, 2016
- STATS ChipPAC, Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Substrate Having Conduct...
- Publication number 20150279815
- Publication date Oct 1, 2015
- STATS ChipPAC, Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VIALESS SUBSTRATE AND METH...
- Publication number 20150179555
- Publication date Jun 25, 2015
- Sung Soo Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Using Substrate With Conductive...
- Publication number 20150001707
- Publication date Jan 1, 2015
- STATS ChipPAC, Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CORELESS INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACT...
- Publication number 20140284791
- Publication date Sep 25, 2014
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MOLDED GRID-ARRAY MECHANIS...
- Publication number 20140197548
- Publication date Jul 17, 2014
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TRANSFERABLE TRACE LEAD FRAME
- Publication number 20140167236
- Publication date Jun 19, 2014
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE GRID ARRAY LEAD F...
- Publication number 20140165389
- Publication date Jun 19, 2014
- Byung Tai DO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Optical Semiconductor Device Having Pre-Molded Leadframe with Windo...
- Publication number 20140011315
- Publication date Jan 9, 2014
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH GRID-ARRAY MECHANISM AND M...
- Publication number 20140008774
- Publication date Jan 9, 2014
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE CIRCUITRY AND MET...
- Publication number 20130256861
- Publication date Oct 3, 2013
- STATS ChipPAC Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A GRID ARRAY WITH A LEADFR...
- Publication number 20130249118
- Publication date Sep 26, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EXTERNAL INTERCONNECT AND...
- Publication number 20130249068
- Publication date Sep 26, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND LEADFRAM...
- Publication number 20130249065
- Publication date Sep 26, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TERMINALS AND METHOD OF MA...
- Publication number 20130249077
- Publication date Sep 26, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Base Substrate with Rece...
- Publication number 20130241030
- Publication date Sep 19, 2013
- STATS ChipPAC, Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE TRACE AND METHOD...
- Publication number 20130154105
- Publication date Jun 20, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFA...
- Publication number 20130154080
- Publication date Jun 20, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONTACTS AND METHOD OF MAN...
- Publication number 20130154118
- Publication date Jun 20, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TERMINALS AND METHOD OF MA...
- Publication number 20130154119
- Publication date Jun 20, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND MET...
- Publication number 20130154120
- Publication date Jun 20, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD AND METHOD OF MANUFACT...
- Publication number 20130154072
- Publication date Jun 20, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLANARITY CONTROL AND METH...
- Publication number 20130099367
- Publication date Apr 25, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME LEAD ARRAY ROUTI...
- Publication number 20130099365
- Publication date Apr 25, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THERMAL STRUCTURES AND MET...
- Publication number 20130087902
- Publication date Apr 11, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THERMAL EMISSION AND METHO...
- Publication number 20120326284
- Publication date Dec 27, 2012
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device with Optical Sensor and Method of Forming Inte...
- Publication number 20120286400
- Publication date Nov 15, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FORMED INTERCONNECTS AND M...
- Publication number 20120280408
- Publication date Nov 8, 2012
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTED CIRCUIT LEAD ARRAY...
- Publication number 20120280390
- Publication date Nov 8, 2012
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD...
- Publication number 20120280377
- Publication date Nov 8, 2012
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS

Arnel Senosa Trasporto

Person

Patents Grantslast 30 patents

Semiconductor device and method of forming PIP with inner known goo...

Semiconductor device and method of forming a package in-fan out pac...

Integrated circuit packaging system with a grid array with a leadfr...

Integrated circuit packaging system with unplated leadframe and met...

Integrated circuit packaging system with routable trace and method...

Semiconductor device with optical sensor and method of forming inte...

Semiconductor device and method of forming base substrate with rece...

Optical semiconductor device having pre-molded leadframe with windo...

Semiconductor device and method of using substrate with conductive...

Integrated circuit packaging system with transferable trace lead frame

Integrated circuit packaging system with external interconnect and...

Integrated circuit packaging system with terminals and method of ma...

Integrated circuit packaging system with electrical interface and m...

Integrated circuit packaging system with routed circuit lead array...

Integrated circuit packaging system with planarity control and meth...

Integrated circuit packaging system with terminals and method of ma...

Integrated circuit packaging system with leadframe and method of ma...

Integrated circuit packaging system with trace protection layer and...

Integrated circuit packaging system with fiber-less substrate and m...

Coreless integrated circuit packaging system and method of manufact...

Leadframe system with warp control mechanism and method of manufact...

Integrated circuit packaging system with routable traces and method...

Integrated circuit packaging system with molded grid-array mechanis...

Integrated circuit packaging system with thermal structures and met...

Integrated circuit packaging system with thermal emission and metho...

Integrated circuit packaging system with trenched leadframe and met...

Semiconductor device with optical sensor and method of forming inte...

Integrated circuit packaging system with leadframe lead array routi...

Integrated circuit packaging system with island terminals and metho...

Integrated circuit packaging system with routable circuitry and met...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Forming a Package In-Fan Out Pac...

Semiconductor Device and Method of Forming Substrate Having Conduct...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VIALESS SUBSTRATE AND METH...

Semiconductor Device and Method of Using Substrate With Conductive...

CORELESS INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACT...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MOLDED GRID-ARRAY MECHANIS...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TRANSFERABLE TRACE LEAD FRAME

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE GRID ARRAY LEAD F...

Optical Semiconductor Device Having Pre-Molded Leadframe with Windo...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH GRID-ARRAY MECHANISM AND M...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE CIRCUITRY AND MET...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A GRID ARRAY WITH A LEADFR...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EXTERNAL INTERCONNECT AND...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND LEADFRAM...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TERMINALS AND METHOD OF MA...

Semiconductor Device and Method of Forming Base Substrate with Rece...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE TRACE AND METHOD...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFA...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONTACTS AND METHOD OF MAN...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TERMINALS AND METHOD OF MA...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND MET...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD AND METHOD OF MANUFACT...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLANARITY CONTROL AND METH...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME LEAD ARRAY ROUTI...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THERMAL STRUCTURES AND MET...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THERMAL EMISSION AND METHO...

Semiconductor Device with Optical Sensor and Method of Forming Inte...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FORMED INTERCONNECTS AND M...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTED CIRCUIT LEAD ARRAY...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD...